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Design Languages >> VHDL-AMS >> divide by zero error
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Message started by babuchacko on Jul 19^th, 2007, 7:34am

Title: divide by zero error
Post by babuchacko on Jul 19^th, 2007, 7:34am

i am developing a bsim4.1 model in vhdl ams... i recently encountered an error "divide by zero"... my modell basically consist of a large no. of algebric eqation which i am implementing in the ams model by simultaneous equations.... since the whole model consist of long and complex equations i really dont know how to debug this error... is their a modular apporox while implementing these sort of complex models....
one of my friend who used verilogams said they used a $strobe command to debug the problem... is their any similar command in vhdl ams to overcome this problem?? your reply is greatly appreciated....

Title: Re: divide by zero error
Post by Sameer on Jul 19^th, 2007, 12:55pm

Hello,

You could write a function to perform division and check for division by zero in the function. You should be able to do something like this to save you some time -
function "/" (NUM: REAL; DEN: REAL) return REAL

Alternatively, consider using the assert statement in VHDL-AMS to check if the divisor is zero.
assert (div = 0) report "Division by zero" severity error;
You would have to do this for every division in you model.

Also, check if the simulator provides any debug message about where or what quantity the division by zero occurs on. In some cases, this might be simply due to non-initialization of quantities leading to a divide by zero in the first NR iteration.

Hope this helps,
Sameer