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Simulators >> Timing Simulators >> multi-rate, what does it mean, how does it work?
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Message started by bernd on Jun 2nd, 2008, 11:52pm

Title: multi-rate, what does it mean, how does it work?
Post by bernd on Jun 2nd, 2008, 11:52pm

In data sheets and advertisement of fast Spice simulators
the terminus multi-rate is widely used.

May one be able to explain what stands behind this
multi-rate technology and how does it work in principal.

Thanks,
Bernd

Title: Re: multi-rate, what does it mean, how does it wor
Post by Simon_Young on Jun 4th, 2008, 9:52pm

Consider a stiff problem.

Conventional SPICE will use the smallest time-step necessary. There would be much repeated computation on the slowly-varying parts of the circuit, with no apparent purpose.

Now, partition the problem into two parts, one part containing the slow time-constant area, and the other the fast time-constant. A multi-rate simulator can solve each part independently - the fast time-constant sub-solution having many (potentially 2 OOM or more) more time-points & smaller time-steps.

Now make it adaptive. That is, interval dependent, where the interval is determined by circuit state or activity. Or user definition (HSIM does this by permitting the user to assign a pwc control on some simulation control parameters.)


Title: Re: multi-rate, what does it mean, how does it wor
Post by byang on Jun 6th, 2008, 12:27pm

Partitioning a circuit into fast-rate and slow-rate components is not always an easy problem. After the partitioning, the coupling relationship between the two components needs to be approximated. The "multi-rate" fast Spice simulator is also called FastMOS simulator because partitioning "plain" MOS circuit is relatively easier.

For most analog circuits, the question is whether one should consider Parallel Spice simulation first. Multi-core computers are getting very powerful and cheap now.

With multi-rate, you may be able to skip a lot of simulation in the slow-rate component of the circuit. But the your multi-core computer got 1 core sitting there idle. If one uses Parallel Spice simulation, the simulator does more computation but the work can be done concurrently on different CPU cores.

I believe analog circuit simulation should consider Parallel Simulation first. Multi-rate should be used for really big circuit now, if it works. Even in this case, one should try to make the multi-rate simulation parallel and accurate. This is what we are trying to achieve at Gemini Design Technology.

byang
www.gemini-da.com

Title: Re: multi-rate, what does it mean, how does it wor
Post by Simon_Young on Jun 12th, 2008, 12:23am

BYang:
> Partitioning a circuit into fast-rate and slow-rate components is not always an easy problem.
> After the partitioning, the coupling relationship between the two components needs to be
> approximated.

I agree with you, Baolin, it's not easy. But it's been done before, and as you say, if the coupling
is loose or can be approximated, then we can consider this a solved problem. If the coupling
cannot be approximated without compromising precision (two examples I often consider are
a) power net injected global coupling and b) fully-coupled memory word/bit lines), then this is
not solved and I consider it an area ripe for innovation.


> For most analog circuits, the question is whether one should consider Parallel Spice simulation
> first.

To paraphrase Mandy Rice-Davies, "yes, well you would say that, wouldn't you?" [Note 1]

For 30 years, parallel SPICE has been the subject of active research. I've known many of
the developers, at Silvaco, NEC, Siemens (Infineon as now is), and others, and used some
of them. None have been able to reach more than a sub-linear acceleration with the number
of processors, and so they've really not solved the problems (load vs. solve; network
latency; memory bandwidth, etc). For some the flattening off of performance gain can be
really quite remarkable.


> If one uses Parallel Spice simulation, the simulator does more computation but the
> work can be done concurrently on different CPU cores.

With the matrix all in shared memory? What about memory bandwidth? What if it is too
big a matrix to fit in memory? And multi-core is scaling pretty slowly - consider memory
bandwidth, for example. It would be interesting if the problem could be distributed more
widely, across network-connected machines, along the lines that is being worked by at
least one other company.

If you've solved these problems (and the unmentioned myriad others) - and I realise
you're not going to want to discuss them, given the early stage of your company, and
the need to maintain some sort of propriety - you've pushed forward the boundary,
and I wish you luck. I've been involved in circuit simulation from many angles for 28
years, and this will be fun to watch. I wish you well.


Note 1 : http://en.wikipedia.org/wiki/Mandy_Rice-Davies [Not, I hasten to add, that I
am suggesting you are having an affair with a British cabinet minister and a Russian
military attache. Just to make it clear!]

Title: Re: multi-rate, what does it mean, how does it work?
Post by jbdavid on Dec 18th, 2008, 7:41pm

Multi-rate simulation was a subject of a lot of research when I was doing my masters oh so many years ago..  basically you have do find some way of partitioning the circuit so that you can solve 2 (or more) smaller matrices each of which is following its own timestep needs rather than one large one.. Partitioning is fairly simple for CMOS circuits.. as most logic inputs are a high impedance driven by a low impedance source (the prior gate driver.   So much of the digital design can be broken up in to a lot of "loosely coupled" subcircuits each running at the timestep appropriate for the circuit and its drivers.
Thru a little analog in, and things start to get a little messy.
ATTSIM was an early offering, aquired by cadence, that featured Multirate. some of this technology was added to AMS designer around 2002.. but it didn't work really well, AFAIK. Other speed up technologies were working better, so Ultrasim, and now SpectreTurbo  (and offerings from other companies like BDA) are taking root in the marketplace.
A good person (besides Ken)  to expound on this might be Al Davis - the author of Gnucap, who I think has tried to add Multirate features to Gnucap ( but I don't know if this suffered fatal flaws and was pulled, or if its there but not really helpful for speed or .???)

My "scholarly paper" was on this topic, but I've not gone back and pulled it into a recent version of word, and dumped it to pdf..
(I did have a hardcopy at one time)  but besides walking thru the extraction of some simple network matrixes ( NOT at the device level I'll add!!) and running some simulations in MathCAD (yes, MathCAD not, Matlab, nor mathmatica) some of the basic issues were how to do interpolation on the inputs when the receiving block has a timestep between the steps on the driving block..  and issue we often face in Event driven simulations today.

Hope this helps a little..
Jonathan

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