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Analog Verification >> Analog Functional Verification >> Analog Mixed Signal Verification (Best tool + meth
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Message started by Faisal on Jun 11th, 2008, 12:47pm

Title: Analog Mixed Signal Verification (Best tool + meth
Post by Faisal on Jun 11th, 2008, 12:47pm

Hi,

I am looking to perform Analog Mixed Signal Verification. How good is the Verilog-AMS for this task? The digital design is described in RTL and the analog design is using Cadence Spectre Environment.  

What is the preferred methodology?

Kind Regards,
Faisal Mateen.

Title: Re: Analog Mixed Signal Verification (Best tool +
Post by Stefan on Jun 11th, 2008, 1:37pm

VerilogAMS is pretty fine for that purpose.
You could also use VHDL-AMS or SystemC-AMS but to my knowledge, VerilogAMS is much better understood by most analog designers :)

Title: Re: Analog Mixed Signal Verification (Best tool +
Post by Ken Kundert on Jun 11th, 2008, 4:25pm

I recommend that you take a look around our companion website (www.designers-guide.com). We have a fair amount of material on analog verification (it is what we do).

-Ken

Title: Re: Analog Mixed Signal Verification (Best tool +
Post by Eugene on Jun 12th, 2008, 12:26am

If you plan to use any behavioral analog models, you should consider how you will certify that the models and their circuit counterparts behave the same. If your circuits are implemented in the Cadence environment, I would use VerilogAMS. VerilogAMS is Cadence's flagship modeling language.

Title: Re: Analog Mixed Signal Verification (Best tool +
Post by loose-electron on Jun 16th, 2008, 1:27pm

Agreed with all the above. Verilog-AMS is very useful for big design work.

http://www.edn.com/index.asp?layout=article&articleid=ca6426885&q=Jerry+Twomey

The above is something that I did for EDN about a year ago on the topic. Ken contributed his methods to the article.

Jerry T.

Title: Re: Analog Mixed Signal Verification (Best tool + meth
Post by Faisal on Jun 27th, 2008, 6:15am

Hi,

Thank you all for replies.  Basically our flow is RTL (Verilog)  and Analog Portion is Schematic composer.

I have one question related to Verilog AMS flow: Does the analog portion required an additional view from foundry?

If yes, what is the view name? what is it called ?  (Why is it needed)



Title: Re: Analog Mixed Signal Verification (Best tool + meth
Post by sheldon on Jul 4th, 2008, 9:40pm

Faisal,

  In the past AMS Designer required a separate view was required for
the devices in the PDK, in more recent releases that requirement has
been removed. You should probably contact your local support for the
details.

                                                               Best Regards,

                                                                  Sheldon

Title: Re: Analog Mixed Signal Verification (Best tool + meth
Post by jbdavid on Jul 15th, 2008, 11:53am

as someone who has been using AMS Designer since it first was released in early 2000, I'll suggest that AMS is better for verification than a co-sim solution..
for background info that is NOT on this website (but managed by the Same Guys) .. look at www.bmas-conf.org  lots of good background papers there
but the primary advantage of AMS is that most of the design is netlisted as a Verilog(AMS) netlist.. which gives you all the features of Verilog-2001 (some of 1364-2005) as well as the Analog extensions.. meaning that you can write models to check analog outputs and integrate them with your normal digital verification environment.

Of course the best approach is to start developing your top level testbench using VERY FAST behavioral models.. and then as the schematics finish up and go to layout, you can substitute them in and run enough spot checks to validate that the models are correct..
(not all of them at once.. as that might make the simulation very slow. )

Commonly this issue is raised when the design is done, and spending a n additional 2-3 months learning Verilog, VerilogAMS and writing models is not palatable to management. At this point you won't get the same design/functional coverage as you would with the first approach, but you can run an effective RTL + transistor level sim ulation in a FAST spice type simulator..
AMSUltrasim is one -- and there are other alternatives, some of which can use the Verilog + spectre netlists you are using today.
and if the analog parts aren't too big, you can even run a tolerable (couple of days or a week or so) run in AMS(Spectre)
--
Hoping you're not in that boat..
jbd

Title: Re: Analog Mixed Signal Verification (Best tool + meth
Post by rajdeep on Nov 6th, 2008, 9:09am


Quote:
[/quote] I'll suggest that AMS is better for verification than a co-sim solution..[quote]


By co-simulation do u mean spectreVerilog type of simulators??

We actually use it and find it very good. The biggest  problem is that  we can use only Verilog-A in spectreVerilog. Time to move onto AMS Designer....but then analog designers take time to trust
a new simulator  :-?

Rajdeep

Title: Re: Analog Mixed Signal Verification (Best tool + meth
Post by jbdavid on Nov 12th, 2008, 6:19pm

Yes thats what I mean..
--
there is little "trusting" curve for the analog designers.. once you get the netlisting working right, since the analog simulation engine is still spectre.
There are a lot of mixed signal designs that don't need anything more than spectre-Verilog .. but I have been lucky enough not to work in those domains for the last 7 years.
PLL's are one area where the true mixed signal capability shines..
--good luck

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