The Designer's Guide Community Forum
https://designers-guide.org/forum/YaBB.pl Design >> Mixed-Signal Design >> Circuit techniques to reduce the history effect in floating body transistors https://designers-guide.org/forum/YaBB.pl?num=1214453330 Message started by affline on Jun 25th, 2008, 9:08pm |
Title: Circuit techniques to reduce the history effect in floating body transistors Post by affline on Jun 25th, 2008, 9:08pm Does any one know of any circuit techniques to reduce the history effect in floating body transistors ? I have a circuit which is showing a lot of history depending on the input pattern. Does anyone Know of any helpful papers? I would like to stick with the floating body transistors as it appears to give me better performance. i am trying to figure out a way to 'minimise' the effect of history. |
Title: Re: Circuit techniques to reduce the history effect in floating body transistors Post by vivkr on Jun 26th, 2008, 3:09am Is it possible for you to apply large voltages to "erase" the memory from your floating gate transistors from time to time? Look up some papers on EEPROM stuff. Regards Vivek |
Title: Re: Circuit techniques to reduce the history effect in floating body transistors Post by affline on Jun 26th, 2008, 4:25pm Thanks for the response. No there isnt a way to do that. The circuit has to work at high speed (in Ghz range) in a datapath. |
Title: Re: Circuit techniques to reduce the history effect in floating body transistors Post by sheldon on Jun 27th, 2008, 7:32pm Affline, Maybe this is stupid but is there any way to add a substrate contact? In SOI processes a substrate contact may not be required but is it forbidden? If it is possible the improved performance may be worth the additional area. Best Regards, Sheldon |
Title: Re: Circuit techniques to reduce the history effect in floating body transistors Post by vivkr on Jun 30th, 2008, 11:03pm I don't know how the memory is building up in your device and how you are using it, but depending on the application, it might be possible to solve the problem by doing the following: Use main device M1 and a shadow device M2 alternately, switching in one or the other into the datapath at any given time(TDM). The device which is switched out of the path can have its memory removed with an erase circuit before it is ready to be switched into the datapath again. I imagine that floating body transistors could have their memory removed with some simple means but I could not tell you really. The rate at which you need to do this muxing (TDM) would depend on the maximum memory buildup you are willing to tolerate and the statistics of your input signal. Perhaps you can also help your devices M1 and M2 by conditioning the input signal appropriately to reduce memory buildup. I would imagine that memory buildup is higher for larger signals and/or larger DC, maybe an AC coupling helps to minimze the effect then. Regards Vivek |
The Designer's Guide Community Forum » Powered by YaBB 2.2.2! YaBB © 2000-2008. All Rights Reserved. |