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https://designers-guide.org/forum/YaBB.pl Other CAD Tools >> Physical Verification, Extraction and Analysis >> LVS ground problem https://designers-guide.org/forum/YaBB.pl?num=1218456564 Message started by aaron_do on Aug 11th, 2008, 5:09am |
Title: LVS ground problem Post by aaron_do on Aug 11th, 2008, 5:09am Hi all, i'm trying to do the layout for a design where I've got more than one ground. Unfortunately, the technology doesn't seem to support more than one ground (which is the substrate bias), so i have to join the grounds together to run LVS. Is there any other way around this? thanks, Aaron |
Title: Re: LVS ground problem Post by bernd on Aug 11th, 2008, 6:56am In my mind: - If your process technology offers a triple well (deep nwell) option you may use it as isolation of one ground. - Most of the PDKs were offering a LVS dummy layer for virtually isolating substrates, these layer oft is called 'PSUB2'. If you happy you will have such a layer. * |
Title: Re: LVS ground problem Post by rribeiro on Aug 15th, 2008, 3:39am Hello Aaron, Bernd idea is good, but you need to see into your technology files if you don't have one layer that allow you to hypothetical isolate many grounds as you like. For example in Tower you have one layer, WN(vss), that allow you to isolate the ground without using deep-nweel. In conclusion, have a look to your technology files to see if you have anything like this, because your process can have deep-nweel but if you don't need to use it the cost it will be less than if you use it (deep-nweel it's something that will increase the price of the waffer fabrication. Hope that this help you Regards, Ricardo |
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