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Analog Verification >> Analog Performance Verification >> two tone simulation for pipeline ADC
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Message started by prem on Nov 26th, 2008, 9:52pm

Title: two tone simulation for pipeline ADC
Post by prem on Nov 26th, 2008, 9:52pm

hi,
i am planning to perform a two tone simulation for a pipeline ADC (9 BIT 2s compliment ADC).Can any one help me to get some idea on two tone simulation....

Title: Re: two tone simulation for pipeline ADC
Post by Paul on Nov 27th, 2008, 12:35pm

Could you formulate the specific question you have? Try to have a look at the following posts in the forum to get started:
http://www.designers-guide.org/Forum/YaBB.pl?num=1134545463
http://www.designers-guide.org/Forum/YaBB.pl?num=1169820193

Regards
Paul

Title: Re: two tone simulation for pipeline ADC
Post by jbdavid on Dec 10th, 2008, 5:26pm

Pull your bow across two strings at the same time.. ?

Title: Re: two tone simulation for pipeline ADC
Post by prem on Jan 1st, 2009, 6:42am

hi,
My input frequencys are 6.875M and 8.75M and the maximum sampling frequncy of the ADC is 80M.Can any one tell is there any criteria in selecting the sampling frequency as in the case of single tone coherent sampling method.

Title: Re: two tone simulation for pipeline ADC
Post by ywguo on Jan 24th, 2009, 7:06am

Prem,

I think that two tone simulation requires coherent sampling, too. First of all, decide how many points do you want to sample? Then calculate the signal frequencies for both tones following the rule in the case of one tone coherent simulation. Please notice each tone is of half amplitude to prevent the ADC from clipping (saturation).

Yawei

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