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Other CAD Tools >> Entry Tools >> Passing monte carlo parameters to verilog-a module.
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Message started by cgt on Apr 2^nd, 2009, 3:10pm

Title: Passing monte carlo parameters to verilog-a module.
Post by cgt on Apr 2^nd, 2009, 3:10pm

Hi,
I have a similar problem as neoflash. I run Cadence verilog-a and in the PDK there are variables defined in an include file (like process spread for monte carlo for example).
I whould like to pass some of those parameters to a verilog-a module.
My goal is to be able to determine the current R*C constant in a
@(initial_step) command so that it can be used to set a bus (calibration) value before each AC simulation in monte carlo.

It seems like the parameters defined in an include file is not global to the rest of the netlist (at least not inside modules) but I may be wrong...

Thanks in advance for any hint, CGT

Title: Re: Passing monte carlo parameters to verilog-a module.
Post by Andrew Beckett on Apr 4^th, 2009, 2:43pm

Inside Verilog-A you can't (I think) reference Spectre global parameters; instead you must pass them into the veriloga module.

So you could (in the CDF for Verilog-A cell) have localParam=globalParam and then it should be possible.

Regards,

Andrew.

Title: Re: Passing monte carlo parameters to verilog-a module.
Post by jbdavid on Apr 6^th, 2009, 7:36pm

In older versions of spectre that don't support localParam, or doing this sort of funny thing with the global params in the cdf, what I did was to add a subcircuit to my modelfiles that would turn the modelfile parameter of interest to a voltage or current of a DC block.

With a structural instantiation of that block, I had access to the variable for my testbench controller. back in 2007 on ic5141 that was about the only way to do it.

I think I may have documented this in one of my 2007 papers?
(see bmas 2007 archives) at www.bmas-conf.org for one of them.

Of course a better way to do this is always preferred.
jbd