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Modeling >> Semiconductor Devices >> Mismatch as a function of distance between the two MOSFETS
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Message started by cmos.analogvala on May 22^nd, 2009, 11:24pm

Title: Mismatch as a function of distance between the two MOSFETS
Post by cmos.analogvala on May 22^nd, 2009, 11:24pm

How does standard deviation of a parameter (say vth0) for mismatch between between two transistor vary with distance between the them ?

Let's say sigma of delta Vt=10mV for MOSFETs placed 10u apart. What will be the sigma of delta Vt for transistors placed 1000u apart in the same layout style ?

Please reply
C A

Title: Re: Mismatch as a function of distance between the two MOSFETS
Post by Berti on May 24^th, 2009, 10:28pm

Matching also depends on the distance, but foundries usually not give specifications on distance mismatch in their DRM.
You can check the following book for more information and typical number for >0.18um CMOS: Binkley, Tradeoffs and optimization in analog CMOS design.

Cheers

Title: Re: Mismatch as a function of distance between the two MOSFETS
Post by cmos.analogvala on May 25^th, 2009, 1:53am

Thanks for the reply.

My designs are at 90nm. I need typical values only.

Say if sigma=10 mV for deives separated by 10u, considering sigma=45mV for devices separated by 3000 u is an optimistic, realistic or pessimistic ?

-CA

Title: Re: Mismatch as a function of distance between the two MOSFETS
Post by Berti on May 25^th, 2009, 5:27am

Distance mismatch was modeled by Pelgrom using a distance mismatch parameter Svto multiplied by the separation distance between devices S:

ΔVto = Svto×S,

where Svto is around 0.7 for a 0.25μm technology.
I don't have number for more advanced technologies since I work for a small company and it is therefore difficult for me to get information from the foundry.

Cheers