The Designer's Guide Community Forum

The Designer's Guide Community Forum
https://designers-guide.org/forum/YaBB.pl
Design >> High-Speed I/O Design >> Low power LVDS
https://designers-guide.org/forum/YaBB.pl?num=1249405284

Message started by RobG on Aug 4^th, 2009, 10:01am

Title: Low power LVDS
Post by RobG on Aug 4^th, 2009, 10:01am

Hello. My name is Rob. I am digitally challenged. ;)

I need to get 320 MBPS data off a chip at 80 degrees Kelvin (cryo). LVDS will burn ~(3.5mA*1.8V) = 5.7 mW/channel. This is too much power. The current, of course, is determined by the 100 ohm termination resistor and 350mV swing.

I only need to drive a few inches before it will go into an external LVDS buffer/driver that will drive a long cable. Given that I only have to drive a few inches, it is possible to use a larger termination resistor? Any other ideas? Could I drive the LVDS buffer directly with CMOS that swings 350 mV?

Thanks,
Rob

Title: Re: Low power LVDS
Post by loose-electron on Aug 9^th, 2009, 6:28pm

there are a bunch of possibilities here - you can design a higher impedance system, you can swing lower voltages, you need to define your degrees of freedom, and also define the RLC network, the environment noise, etc, that you are trying to drive.

Title: Re: Low power LVDS
Post by RobG on Aug 11^th, 2009, 9:12am

loose-electron wrote on Aug 9^th, 2009, 6:28pm:

I totally agree. My biggest problem is that I don't understand the requirements of the LVDS buffer well enough to customize the interface. Second biggest problem is that I'm too lazy to look it up. ha ha. (Actually, I was just hoping to get a feel for what lies ahead by "poking my head over the cubicle" into this office and chit chatting about what I thought were easy questions.)

National has a great document out there on the subject, but it is 100+ pages!

Here is a schematic from maxim:

In the spirit of chit-chat, how is the common mode of the LVDS input determined? Could I drive the buffer with by switching it to 0 or 350mV? These are the things that aren't immediately obvious from reading the spec.

Title: Re: Low power LVDS
Post by PaloAlto on Aug 12^th, 2009, 5:01am

The transmitter is the one controlling the CM. I'm talking just from the top of my head, but I think that it should be in the order of 1.2V. However the receiver should work with a CM variation from 50mV or so until 2V.

Title: Re: Low power LVDS
Post by RobG on Aug 12^th, 2009, 8:39am

Thanks, that is what I figured but the circuits didn't show it.

Title: Re: Low power LVDS
Post by kanan on Aug 13^th, 2009, 7:59am

Hi Rob,
One suggestion could be that you try and model the transmission line you have in mind and see for yourself what the trade-offs are.
It should be easy to get a cross-section of the PCB you intend to use and put it in some solver like mtline and plug it in your simulations. While it may not be 100% accurate, you'd definitely get a feel of how much difference the impedance termination makes to the signal integrity.