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Design Languages >> VHDL-AMS >> No symbol view when modeling a cell with VHDL-AMS in cadence
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Message started by Parisa on Sep 14th, 2009, 12:03pm

Title: No symbol view when modeling a cell with VHDL-AMS in cadence
Post by Parisa on Sep 14th, 2009, 12:03pm

Hi,

I am working in analog-mixed signal field and want to create a symbol view for a non-linear load which I have it's code in VHDL-AMS. The VHDL-AMS code runs properly in Simplorer. Anyhow, I have problem with Cadence.  
Would you please help me with the steps that I should do ? I do as follows: 1) file-->new:cell view, 2)Tool: VHDL-AMS editor, view name: entity
3)it brings a terminal-like page that I should insert the VHDL-AMS code in. after saving and quiting that page (with :wq command), it asks if I want to creat a symbol for that and when I click on "yes" , nothing happens !!! So, I can't see any symbol view when I open a schematic and go for the instances.

Do you have any idea why is that  and how can I solve the problem?

Thank you very much,
Parisa

Title: Re: No symbol view when modeling a cell with VHDL-AMS in cadence
Post by godfather on Sep 14th, 2009, 4:59pm

hello parisa,
Ok the code for vhdl-ams remains the same whichever tool you use just change the use... library... lines accordingly see some examples of vhdl-ams in cadence directory and then probably what you did creating a symbol and so on....thats perfect, after that you should get symbol view.

the reason why i am telling to change the 1st few include,use... library... lines are different for different softwares like simplorer, systemvision and so on....

the terminal like window which comes up is an editor, you can use nedit editior which is just like notepad, just include the default editor as nedit in your bash file thats it...

thx....



Title: Re: No symbol view when modeling a cell with VHDL-AMS in cadence
Post by Parisa on Sep 15th, 2009, 6:01pm

:( it doesn't work :(
The code is very simple. Would you tell me what are the common libraries ? Mine is like this now:

LIBRARY ieee;
LIBRARY std;

USE IEEE.ELECTRICAL_SYSTEMS.all;
USE IEEE.FUNDAMENTAL_CONSTANTS.all;
USE IEEE.std_logic_1164.all;
USE IEEE.MATH_REAL.all;
USE IEEE.mechanical_systems.all;

Thanks,
Parisa

Title: Re: No symbol view when modeling a cell with VHDL-AMS in cadence
Post by Andrew Beckett on Jan 5th, 2010, 1:12pm

Several questions:

1. Do you have something like this in your cds.lib:

SOFTINCLUDE $IUSHOME/tools/inca/files/IEEE_vhdlams/cds.lib

This is needed to get the AMS-flavour of the IEEE libraries.

2. Do you have the IUS installation in your UNIX path? If so, which IUS version are you using? (type "ncsim -version" in a UNIX terminal)

3. Which IC version are you using (look at the Help->About in the CIW)?

A quick experiment with the above setup (I was using IUS82) showed nothing wrong...

Were there any messages shown in the CIW when "nothing happened"?

Regards,

Andrew.


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