The Designer's Guide Community Forum
https://designers-guide.org/forum/YaBB.pl
Simulators >> AMS Simulators >> Simulation of realistic components
https://designers-guide.org/forum/YaBB.pl?num=1255439237

Message started by Emmanuele on Oct 13th, 2009, 6:07am

Title: Simulation of realistic components
Post by Emmanuele on Oct 13th, 2009, 6:07am

Hi to everybody!
I'm using AMS Simulator (in Cadence SPB 16.01) and I am stuck with a problem... would you try to give me your opinion?
I need to improve a simulation with realistic components: if current flows through a resistor, it heats up, and its resistance changes; this, in the next seconds, will affect the current flowing through it.
I didn't find a way to simulate it with a single transient analysis ...
I tried to write expressions in the resistors, but AMS Simulator doesn't support variables TEMP or TIME in standard components. I tried to define parameters, but the problem remains. I tried to define new resistor models, but I found only a simple function, depending by 3 parameters; besides, AMS Simulator doesn't change the temperature of the components during transient analysis, so this last feature could be used only in parametric analysis. I also tried with Analog Behavioural Modeling, but I didn't understand very well how it works.
Any suggestions?
Thank you for the help you'll give me.
Cheers,
Emmanuele

Title: Re: Simulation of realistic components
Post by rajdeep on Oct 13th, 2009, 7:21am

Do you know how the resistance value changes as the temperature of the resistor changes due to current flowing thru it? i.e. do you know R = f(T), where T = g(I), these two functions? (R =resistance, T = temperature, I = current)

If  you know, you can write a model in Verilog-A/MS to model a variable resistor and use that in the transient analysis. Note that only the temperature effect will be taking place for you resistor, not for any other components as overall ckt temperature hasnt changed!!!

From my exp of using Cadence spectreVerilog, spectre I have very little hope that its AMS simulator will support something like changing ckt temperature on the fly.

There is also DC analysis where you can vary temperature, but in single transient.... :-/

cheers!
Rajdeep

Title: Re: Simulation of realistic components
Post by Emmanuele on Oct 13th, 2009, 7:40am

Thank you Rajdeep for your reply.
Yes, I can find out how the resistance changes with respect to the current. But my function T = g(I) will depend on the resistance itself, because T depends on the integral of the current, which in turn is driven by R.
Besides, I don't know what Verilog-AMS is. Is it a language or an actual software?
I thought to add parameters which change with the istantaneous value of I or R, and thus simulating a change of T, but it seems AMS is smarter than me... because it doesn't accept a parameter definition depending on TEMP.
I read the only way to use parameters such as TEMP or TIME is using Analog Behavioural Modeling, but I didn't get how to use this feature.

Title: Re: Simulation of realistic components
Post by rajdeep on Oct 13th, 2009, 8:23am

Verilog-AMS is a language. You can find its manual in the web. Its a language that will allow you to do Analog behavioal Modeling.

You can look for simple resistor model and build your model by adding all the extensions. It supports differential (ddt), integral operators (idt, idtmod)  also and it is very easy to learn, particularly if you are familar to Verilog and C like languages.

But then after that you haveto use that model for your simulation. So you have to create a verilogams view of that resistor just like one creates sc hematic or symbol view.

Having said all these, I dont think you can vary ckt temperature on the fly even if you use Verilog-AMS model. You can access the set temperature (that you have set prior to starting the simulaiton) by a system function $temperature in Verilog-AMS. It returns the temperature.

Good luck :- ) !!
Rajdeep

Title: Re: Simulation of realistic components
Post by Emmanuele on Oct 13th, 2009, 8:34am

I see...
Thank you, I'll try to learn this new language. (I don't know if this'll fix my problem, but it seems interesting anyway.
Just one doubt: how can I create a verilogams? With Design Entry?
Should I not be able to change temp on the fly, I could set a variation in the resistance which doesn't depend directly on the temp. (the temp variation could be written as dependant on current only) What do you think?

Title: Re: Simulation of realistic components
Post by Frank Wiedmann on Oct 13th, 2009, 9:14am

You can find a possible way of modeling self-heating in http://www.designers-guide.org/VBIC/release1.2/vbic1.2.va.html (see the sections starting with "`ifdef ElectroThermal"). This model is written in Verilog-A.

You first create a current that corresponds to the power dissipated by the device. This current is then fed to a network that corresponds to the thermal properties (thermal capacitance, thermal resistance) of the material. The voltage over this network corresponds to the temperature increase of the device over the ambient temperature.

Title: Re: Simulation of realistic components
Post by rajdeep on Oct 13th, 2009, 9:41am


Quote:
 I could set a variation in the resistance which doesn't depend directly on the temp. (the temp variation could be written as dependant on current only)    


This should work. Anyways, a link to such a complex model has been provided. May be that could be helpful. But what you said, according to me should work.

You can create verilogams view of you resistor model. The way you create a schematic and/or symbol view of a circuit. In the dropdown, you should be able to find veriloga and verilogams views. Choose the one you like. A text editor should open, write your model. Save and close. That should call the compiler which will tell u if any syntax error is there. Create a symbol of it and use it as any other design block. I have assumed you are using Cadence ACE environment to create your design blocks.

(Note that Verilog-A is a subset of Verilog-AMS language)

cheers!
Rajdeep

Title: Re: Simulation of realistic components
Post by Frank Wiedmann on Oct 14th, 2009, 12:42am

Use the veriloga view if you are using Spectre (and not AMS) as your simulator. You can find many examples for Verilog-A models in the library ahdlLib from the Cadence installation. See also http://www.designers-guide.org/VerilogAMS/.

Title: Re: Simulation of realistic components
Post by Emmanuele on Oct 14th, 2009, 2:19am

Thank you folks.
It seems I have a lot of work ahead...
I'll work on the Verilog manuals - funny how ten new things to learn appear when you've just got one!
If I got it right, I have to define a schematic project (ie in Design Entry) and then to associate verilogams to some components. right?
Cheers,
Emmanuele

Title: Re: Simulation of realistic components
Post by Emmanuele on Oct 14th, 2009, 6:42am

Uhm. I have trouble with Verilog.
I tried to import simple programs (written in a notepad file) using Part Developer, and it gave me plenty of errors.
For example, I tried the first one proposed in the manual:
----------------------------------------------------------
module shiftPlus5(in, out);
input in;
output out;
voltage in, out; //voltage is a signal flow
//discipline compatible with
//electrical, but having a
//potential nature only
analog begin
V(out) <+ 5.0 + V(in);
end
endmodule
----------------------------------------------------------
but I got errors like "Import failed because of an error on line XXX and token 'YYY' in file ZZZ. Correct the input file and reimport."
Any suggestions?

Title: Re: Simulation of realistic components
Post by Riad KACED on Oct 15th, 2009, 2:40pm

Hi Emanuele,

You better post the exact warnings/errors because

Quote:
... error on line XXX and token 'YYY' in file ZZZ ...

Is not that helpful I'm afraid.

Anyway, I have created the following shiftPlus5.va file:

Code:
`include "constants.vams"
`include "disciplines.vams"

module shiftPlus5(in, out);
 input in;
 output out;
 voltage in, out; //voltage is a signal flow
 analog begin
   V(out) <+ 5.0 + V(in);
 end
endmodule


I have compiled the above code using:

Code:
spectre #dpl /dev/null #ahdlfile shiftPlus5.va


It all worked fine !
Now, I have compiled my code using Spectre (The Cadence's Spice-like simulator). I don't have any idea about your tool you mentioned above.

Also, If you are interesting in modeling resistors whose value depends on the Temp, then you may look at the model files in your PDK too. Modern PDKs/technology nodes provide these kind of models.

Cheers,
Riad.

Title: Re: Simulation of realistic components
Post by rajdeep on Oct 16th, 2009, 2:13am

Hi Emmanuele,

Are you using CADENCE ICFB? I dont know what is part developer  :-|
notepad??? You are in Windows? Are you doing things from command line?

Im familiar with this tool:
http://www.ece.virginia.edu/~mrs8n/cadence/tutorial3.html

May be you are using something else...

cheers!
Rajdeep

Title: Re: Simulation of realistic components
Post by Emmanuele on Oct 16th, 2009, 5:07am

Thanks for your replies.
I'm working with Cadence SPB, a suite of software which comprises a schematic editor, a PSpice simulator (AMS Simulator), a part developer, and a lot of other software. And it doesn't comprise Virtuoso, ICFB, nor Spectre.
In one of these software, theoretically it's possible to import models written in Verilog (or VHDL), but every file I try to import gives the same problem.
I also tried Riad KACED's code, but it doesn't work all the same.
Below you can see which errors I got with the implementation:

-------------------------------------------------------------------------
10/16/09  14:04:15      SPLBPD-461      Import failed because of an error on line 7 and token ',' in file \\Desktop/12334.v. Correct the input file and reimport.
10/16/09  14:04:15      SPLBPD-461      Import failed because of an error on line 7 and token 'out' in file \\Desktop/12334.v. Correct the input file and reimport.
10/16/09  14:04:15      SPLBPD-461      Import failed because of an error on line 8 and token 'analog' in file \\Desktop/12334.v. Correct the input file and reimport.
10/16/09  14:04:15      SPLBPD-461      Import failed because of an error on line 9 and token '<' in file \\12334.v. Correct the input file and reimport.
10/16/09  14:04:15      SPLBPD-461      Import failed because of an error on line 10 and token 'end' in file \\Desktop/12334.v. Correct the input file and reimport.
10/16/09  14:04:15      SPLBPD-261      Could not load Verilog file \\12334.v. Incorrect format.
-------------------------------------------------------------------------

I'm sorry, maybe I asked help in the wrong forum...

Title: Re: Simulation of realistic components
Post by rajdeep on Oct 16th, 2009, 5:30am

Iv e a  strange feeling it does not support Verilog-A. Thats why it gives in error in line 7 where it finds the word voltage.  A token error indicates a parsing error i.e. it finds a token which is not defined in its grammar. Thats what I feel.


Try importing in the same way, a pure verilog code. Pls. note that Verilog, Verilog-A, Verilog-AMS are 3 different languages, the last one being the superset of all.

If the Cadence SPB tool that you are using does not accept verilog-A or Verilog-AMS then you cannot use it. Then probably you better model the same stuff in spice. Some macromodeling will be your best bet then I guess.

cheers!
Rajdeep

Title: Re: Simulation of realistic components
Post by Geoffrey_Coram on Oct 19th, 2009, 1:29pm

If it doesn't know voltage (or electrical, which is what I would have chosen), then maybe you haven't included 'discipline.h" or "disciplines.vams" where this stuff is defined.

The Designer's Guide Community Forum » Powered by YaBB 2.2.2!
YaBB © 2000-2008. All Rights Reserved.