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Design >> Analog Design >> need help choosing op-amp config
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Message started by carporsche on Oct 27^th, 2009, 12:05am

Title: need help choosing op-amp config
Post by carporsche on Oct 27^th, 2009, 12:05am

Hi guyz

I am designing an ASIC CMOS op-amp for meeting following design specs in TSMC .35um tech.
1. open-loop gain : 65-70dB
2. Unity gain frequency : 500MHz
3. Phase Margin ~ 60 degrees
4. Need an internal compensation technique.
5. 2 V p-p ODR

Can someone suggest me a configuration to be used.
Can this be achieved by using a standard folded cascode technique followed by a class AB output stage?

Thanks

Title: Re: need help choosing op-amp config
Post by raja.cedt on Oct 27^th, 2009, 12:14am

hi,
yes folded will give that, may be cascode also can work because i guess you are with 3.3 v supply and 2v DR you want.

Thanks,
Rajasekhar.

Title: Re: need help choosing op-amp config
Post by carporsche on Oct 27^th, 2009, 12:53am

Thanks a lot for your response . But can you suggest me any book or paper where i can actually build up a step-by-step procedure.
Actually the thing is that i have done quite a number of designs for the above specs. Phase margin never ever matches with what i design for.
But my hand calculations and simulated results are always way off.

I have tried designs from holberg, baker and martins

Can someone suggest me any other approach tht i need to take while designing op-amps.

Title: Re: need help choosing op-amp config
Post by raja.cedt on Oct 27^th, 2009, 1:53am

hi,
i usually adjust many parameters manually, most of the times my UGB will be my control...but many times i got phase margin near to my calculations.could you please explain how you are estimating that? please use the following reference for good design strategy..

http://www.sendspace.com/file/7g0wce

Thanks,
Rajasekhar.

Title: Re: need help choosing op-amp config
Post by Mayank on Oct 27^th, 2009, 2:03am

Hi,
I guess if your supply is 3.3V , then you need nt go for class AB o/p stage...You need it only if you want rail-to-rail o/p....Also keep in mind the i/p CM level is decided by the o/p CM level of the ckt preceeding your opamp...I always prefer fully differential topologies coz you hv CMFB control in your hands... Normal FC will do..

As for your design methodology, USE GM/ID ---Gives me excellent results !!!
i guess you are using first order hand calculations using standard eqns....Use GM/ID methodology & try to make your analysis a bit more exact by including sec effects eg :-- parasitics consider Cgd & cdb along with Cgs....
In GM/ID, obtain plots for different lengths,vgs,vds,vbs,corners....Use those values to design your OTA...Keep design eqns as exact as possible...Use help of some mathematical tool like mathcad, matlab etc....

Feel free to ask anything else you want......
regards,
Mayank.

Title: Re: need help choosing op-amp config
Post by sos on Nov 3^rd, 2009, 6:10am

carporsche wrote on Oct 27^th, 2009, 12:53am:

I suggest you will get a *lot* of improvement out of taking a past design and figuring out why your results differ from simulation. If you don't have a match there, you will not achieve your goals.

Steve Smith
Cadeka Microcircuits

Title: Re: need help choosing op-amp config
Post by Mayank on Nov 3^rd, 2009, 7:08am

Hi both sos & carporsche,
As carporsche pointed out earlier, He was using hand calculations for design....Hand calculations, in which you mostly tend to include only 1st order effects, dont give accurate results...ex :-- parasitics like Cgd, Cdb which we generally tend to ignore in hand calcs to make maths easier affect the design a lot, say if you keep on increasing transistor size ignoring it's parasitic caps...

Trying to match your hand calculations with spectre results will require a lot of ckt tweaking....I would say avoid this spectre/spice monkeying...Go for Gm/Id methodology....if you want material, Just Google it, you will get many papers on it....and you will improve upon it as you go through a design following gm/id....

regards,
mayank.

Title: Re: need help choosing op-amp config
Post by sos on Nov 4^th, 2009, 8:02am

Mayank wrote on Nov 3^rd, 2009, 7:08am:

I read it differently (maybe I'm wrong). I thought carporsche was saying that both hand calculation and sims were way off, I assumed that what was meant was neither matched silicon. I agree that hand calcs and sim with detailed models will be quite different from each other, especially at 500MHz.

Now I haven't used gm/id, but I'd be very surprised at any method that gives good results at 500MHz without detailed (and, of course, accurate) models.

Steve

Title: Re: need help choosing op-amp config
Post by Mayank on Nov 4^th, 2009, 10:01am

Hi sos,
Gm-by-Id is a graphical design technique which is based on technology plots of figures-of-merit simulated from a single MOSFET...That's why it gives you accurate results, provided your analysis is decent..You may take help of some mathematical tool like mathcad/matlab...I wish i had some material to share...Google it, surely you will find something on it....

--Mayank.

Title: Re: need help choosing op-amp config
Post by carporsche on Nov 4^th, 2009, 2:06pm

Hi all

I was doing a lot of reading on gm/id based design methodology after people suggested i use it. And frankly speaking its pretty intuitive and for the simple circuits i do achieve the required design specifications.

Will be implementing my final design on this and hopefully get the desired results.

Have uploaded a couple of documents which may be useful for reference.

Thanks all!

Title: Re: need help choosing op-amp config
Post by carporsche on Nov 4^th, 2009, 2:09pm

here's another file. i couldnt upload 2 files in the same post .

Title: Re: need help choosing op-amp config
Post by sos on Nov 10^th, 2009, 6:47am

Mayank wrote on Nov 4^th, 2009, 10:01am:

This sort of approach can be great for amplifiers with only a few transistors in them, but I don't see it being very useful in designing a 500MHz op amp.

Steve

Title: Re: need help choosing op-amp config
Post by Mayank on Nov 10^th, 2009, 11:16am

Hii Steve,
My experience says gm/id graphical design methodology works best for even the most complicated design...I myself have done it for many operational amplifier topologies, ranging from a simple CS stage, normal 2-stage rz-cc compensated OTA, to more complex designs like class AB Folded Cascode opamp design, rail-to-rail i/p topologies, DAC current cells, current mirrors, bias ckts.....

Gm/Id is by far the best design methodology i have come across....It requires analysis....but you can use tools like matlab/mathcad....But atleast you are sure you are designing the best point & that wotever you design will match with your simulations....

What methodology do you have in mind ?

--Mayank

Title: Re: need help choosing op-amp config
Post by sos on Nov 12^th, 2009, 6:29am

Mayank wrote on Nov 10^th, 2009, 11:16am:

Well, I haven't tried gm/id myself. It just seems improbable that simple models will give adequate results at 500MHz. I don't have any problem with the idea at lower frequencies, say <10MHz.

I use fully detailed transistor models with Spectre analog simulation. I've certainly found cases where the models failed miserably, usually due to poor assumptions on the foundry's part, a few my fault. It takes a lot of simulation, and the first few chips with a foundry have a lot of risk, not knowing how good the models are. The models need to be good, so do the corner cases.

My designs are amplifiers and similar analog in the 1-1000MHz closed loop bandwidth range. Most of my experience (80%?) is bipolar.

Steve

Title: Re: need help choosing op-amp config
Post by Mayank on Nov 12^th, 2009, 7:54am

Hi Steve,
I fully agree with all the point that you just said....But seems like you didnt catch the methodology correctly....It uses the very same models that we use in simulations....I will explain.

Gm/Id Methodology used Figures of Merits of a transistor, (roughly defining as the characterstics that are independent of MOSFET size). Steps involved in gm/id methodology --->

1. Simulate a single transistor (of certain width,not too small not too big say 1u in a 65nm Process) in spectre/spice...iterate and Store the DC operating point info (like ids,gm/id,id/w,gm/gds,etc...) for different Lengths, different corners of P & T, against full sweeps of vgs, vds, vbs and so on.....
NOTE:-- This step gives you the transistor conditions directly from simulation, So if you a transistor happens to be in any ckt under those operating conditions, it will behave exactly the same as you simulated.

2. Formulate a mathematical model of your ckt, by writing KVL,KCLs at different nodes, taking into acc. as many parasitics as you can...Mathematical Tools come in handy here....

3. Optimize using mathematical tools & arrive at the best design point..Translate that point into Schematic/Spectre and get the simulation results...

For me, It matched with the simulations quite accurately for designs with UGB ~ 400MHz.....Never went upto GHz range of UGBs...

--Mayank

Title: Re: need help choosing op-amp config
Post by Mayank on Nov 12^th, 2009, 7:58am

Sorry forgot the other part of your post.....

As for the Models,
Your point is totally correct....Models for new processes are nascent and show reasonable difference in CAD vs. SILICON comparisons.....Models mature as the Process matures...Can't do anything about it....Whenever i switch foundries, i play defensive.....Ensure reasonable margins everywhere (i try & account for 5/6 sigma variation)

BIPOLAR is cool, though I have a certain inherent apprehension of it (:-P maybe coz i most of my exp is on MOS).....
BUT You can't deny the fact ----> When God did his masters in Analog/RF, he designed BJT & Si-Gae as a part for his Thesis.... :P
CMOS is the plebian version of BJT,designed for digital, but sadly what most of analog guys also have to work upon....coz it's cost-effective....That's what we all want in the end... :-)

--Mayank.

Title: Re: need help choosing op-amp config
Post by sos on Nov 12^th, 2009, 9:06am

Thanks for the explanation Mayank, you make the gm/id approach sound pretty reasonable.
It sounds like perhaps more work to set up, with corresponding more insight into circuit operation when done.

Steve

Title: Re: need help choosing op-amp config
Post by carporsche on Nov 16^th, 2009, 11:08pm

@Mayank

I have implemented the gm/id method for the folded cascode topology.
Got all the data in MATLAB and plotted the following curves.

id/W vs gm/id
id vs (2*id/gm)
gm/gds vs gm/id
ft vs gm/id

I seem to get the design working for values of unity gain frequencies around 100MHz.
But for higher values of like the one am designing for (500MHz) the gm/id values are way too high and not obtainable from id/W vs gm/id graphs.

I dont know whether am missing any design approach here. Am sometimes confused as to how to use the graphs generated methodically!

Can someone help please!

thanks

Title: Re: need help choosing op-amp config
Post by Mayank on Nov 17^th, 2009, 1:55am

Hello Caporsche,
i have designed 2-stage OTA's with UGB in the range of 400 MHz or so......I didnt understand a few points in your post :--

1. What is the significance of id vs. (2*id/gm) Plot ??

2. I guess you did not take into account the cgd & cdb values....
In your plots, also use cdb/cgg & cgd/cgg plots....Then using the value of cgg found from fT/gm plot, you can find cdb & cgd....
Incorporate Cgd & cdb caps also into your calculations when you are working in 500 MHz range or above.....
Use MATLAB to handle the complex expressions formed. You can also optimize the ckt using these plot values in any mathematical tool.

3. If you are sweeping vgs & vds completely uptil vdd, the values of gm/id in these plots are the maximum that you can attain in any circuit....I guess you probably meant Higher Gm values for higher UGB requirements... ...Once Gm/Id is sufficiently high, Increasing current is the only option we hv got :(

4. In some technologies, intrinsic gain of the transistor gm/gds is quite small....Increasing current increases Transconductance, but decreases gain at the same time...You might have to increase the length to keep gm/gds high....

5. GBW can be achieved easily by increasing the current...But If you are still not able to achieve the Gain requirements even after increasing lengths to acceptable values, Revisit your topology

Hope that answers you....

--Mayank

Title: Re: need help choosing op-amp config
Post by carporsche on Feb 17^th, 2010, 1:32pm

Hi Mayank

Have been looking into this gm/id method for quite sometime now. I still need some clarifications from you.
You did mention tht u have designed rz-cc 2 stage op-amp and thats exactly what am designing. Later on i want to design a Fc OTA too.
Some points
1. Assume currents in various branches
2. I break my OTA into basic analog structures,
Diff pair = supplying gm / gain
Load struct = operating in strong inversion (here i use the vurve gm/id vs vdsat and find the corresponding gm/id ratio and proceed further)
bias structures = depending on the current to be supplied etc etc
3. Suppose i need a buffer after my OTA. how do i design tht?
4, Also could you give me an insight into choosing values for rz(transistor implementation in triode) and CC values using gm/id graphs.

Do you follow the textbk equations and design ?
Would be really helpful if you could provide me some hints which you have picked up while designing high bandwidth amplifiers.

One more point , i always proceed with designing for bandwidth.
Still havent got a hang while designing for gain. Could you please point out the things while designing for gain too.

Have put in too many questions, kindly excuse that :). But i do feel the gm/id method is really helpful.

thanks again for your time.