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Design >> High-Speed I/O Design >> ESD simulation
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Message started by tg on Nov 7^th, 2009, 11:17pm

Title: ESD simulation
Post by tg on Nov 7^th, 2009, 11:17pm

Hi all,
I would like to ru a simulation of a power-rail esd protection (design is already exist). In order to do it correctly I need to create 2KV HBM pulse and 200V MM pulse but not sure about the right way to do it.
Can someone help?
Thanks!

Title: Re: ESD simulation
Post by Seeker on Apr 2^nd, 2010, 8:51am

tg,

You probably don't need this info now but I thought I would reply anyway. For a 2kV HBM pulse, you need to apply a 0-2kV step through a 1.5Kohm resistor in series with a 100pF capacitor between your zapped pads.