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Design >> Analog Design >> Input Common Mode in Non-Inverting Amplifier
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Message started by ic_engr on Jan 12^th, 2010, 12:47pm

Title: Input Common Mode in Non-Inverting Amplifier
Post by ic_engr on Jan 12^th, 2010, 12:47pm

Hello All,

I am designing a low noise non-inverting ampliifier. The supply voltage is 1.0V. The dc level of input is 0.5V. The application I want to use this amplifier provides inputs having peak-peak of 600mV. How can I design the input stage of the amplifier to handle such a large input signal when my supply is only 1.0V, I am concerned about the input common mode range ?

ic_engr

Title: Re: Input Common Mode in Non-Inverting Amplifier
Post by ACWWong on Jan 12^th, 2010, 1:02pm

If the DC common-mode input is fixed at 0.5V you could use either P or N input differential pair, so long as you have enough headroom for the current source.... this depends on your technology (e.g BJT wouldn;t work). Assuming CMOS, low thresholds help.
You can also use parallel N and P input pairs, this is especially required if your common-mode range input is wide. Various techniques exist to keep the gm constant over the common-mode input range required.
A good reference these parallel N & P inputs is:
Shouli Yan and Edgar Sanchez-Sinencio, “Low Voltage Analog Circuit Design Techniques: A Tutorial,” IEICE Transactions on Analog Integrated Circuits and Systems, vol. E00-A, no. 2, February, 2000.

cheers

aw

Title: Re: Input Common Mode in Non-Inverting Amplifier
Post by Mayank on Jan 12^th, 2010, 8:46pm

Hi,
Same advice --- Go for a Folded Cascode kinda topology.
As ACWong says, Rail-to-Rail ICMR can be supported by parallel P & N Differential Input Pair.
You can go for Constant Gm ckts too if you require a very accurate gain over PVT.

--Mayank

Title: Re: Input Common Mode in Non-Inverting Amplifier
Post by ic_engr on Jan 13^th, 2010, 9:54am

I believe Folded Cascode is NOT practical for 1.0V operation due to headroom limitations. I need a DC OpenLoop Gain of atleast 70dB.

ic_engr

Title: Re: Input Common Mode in Non-Inverting Amplifier
Post by Dipankar on Jan 13^th, 2010, 4:29pm

yes 70 dB will be difficult with 1V supply. But the headrom problem will be more if you go for current-mirror load type.

Which tech node? What's your VT ?

If you need rail to rail ICMR then folded cascode with both p & n type diff pair will be the best candidate. Now for 70 dB gain you can try gain-boosted load.

Title: Re: Input Common Mode in Non-Inverting Amplifier
Post by Mayank on Jan 14^th, 2010, 1:06am

Hi,

Quote:

I believe Folded Cascode is NOT practical for 1.0V operation due to headroom limitations. I need a DC OpenLoop Gain of atleast 70dB.

Use Low-Voltage Cascode Biasing & Go for two stage design to achieve 70 dB Gain.

--
Mayank.

Title: Re: Input Common Mode in Non-Inverting Amplifier
Post by ic_engr on Jan 14^th, 2010, 8:19am

Which tech node? What's your VT ?

Tech is either 90nm or 65nm, diff pair is SVT all other transistors ar HVT.

ic_engr

Title: Re: Input Common Mode in Non-Inverting Amplifier
Post by Asmodeus on Jan 18^th, 2010, 11:09pm

70dB gain will reflect to a maximum input of less than 1 mV for 1 Volt supply(even neglecting the overdrive voltages). How can u get 70dB gain for 600mV peak to peak input with 1V supply ??

Title: Re: Input Common Mode in Non-Inverting Amplifier
Post by ACWWong on Jan 19^th, 2010, 5:13am

Asmodeus wrote on Jan 18^th, 2010, 11:09pm:

70dB gain will reflect to a maximum input of less than 1 mV for 1 Volt supply(even neglecting the overdrive voltages). How can u get 70dB gain for 600mV peak to peak input with 1V supply ??

Hi Asmodeus,

The 70dB is for open loop gain. Hence the amplifier can then be used in a feedback configuration (in this case non-inverting) to yield the closed loop gain required. Please remember an ideal op-amp has infinite open loop gain...

cheers

aw

Title: Re: Input Common Mode in Non-Inverting Amplifier
Post by Asmodeus on Jan 22^nd, 2010, 3:50am

Of course ! It wasn't mentioned how much closed loop gain is required ! Anyways A rail to rail opamp with both PMOS and NMOS input will be the solution 4 this problem. I guess max of the guys have suggested d same ! other could be Quasi-floating gate techniques by Ramirez !! I wonder if there are any other solution 4 it ! And don't even think of cascoding ! nothing more than a 5 transistor structure !