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Message started by somisetty on Jan 20th, 2010, 11:37pm

Title: PRBS pattern for eye diagram USB FS driver...
Post by somisetty on Jan 20th, 2010, 11:37pm

hi,

i wanted to generate eye diagram for USB FullSpeed Driver to measure jitter.Would any one suggest me,the PRBS pattern,need to use for generating eye diagram?

pattern means how may minimum bits required to get any eye pattern...bit time etc...

Thanks

Title: Re: PRBS pattern for eye diagram USB FS driver...
Post by raja.cedt on Jan 21st, 2010, 7:30am

hi,
   i didn't understand your question, can you reframe it. I mean bit time is the one for which you design enitre transiver and give some junk prbs and get the EYE.

Thanks,
RAjasekhar.

Title: Re: PRBS pattern for eye diagram USB FS driver...
Post by somisetty on Jan 22nd, 2010, 2:57am

Thanks for the reply..

I wanted to generate any eye diagram for USB Full Speed Driver.For  that i need a prbs.To generate a prbs,i got a perl script which requires the bit-time as input.

USB protocol defines USB FS mode should have 12Mb/s data rate.I calculated the bit time as 83.33nsec.Iam not sure abt  the bit time.can anyone clarify the bit-time?

Thanks




Title: Re: PRBS pattern for eye diagram USB FS driver...
Post by pancho_hideboo on Jan 22nd, 2010, 3:12am


somisetty wrote on Jan 22nd, 2010, 2:57am:
USB protocol defines USB FS mode should have 12Mb/s data rate.
I calculated the bit time as 83.33nsec.
Correct.

See http://www.designers-guide.org/Forum/YaBB.pl?num=1234925581/5#5

Title: Re: PRBS pattern for eye diagram USB FS driver...
Post by somisetty on Jan 25th, 2010, 12:54am

Thanks for the reply...

I have given USB Full Speed Drivers a PRBS with bit time of 83n and 127bits. As USB Io is a differential output,the out pins shown in the image are DP_OUT ans DM_OUT.

when i generated the Eye diagram for 2 output pins separately with Time base as 83nsec and got the below eye...As you can see the eye is not complete,can any one let me know whats wrong with the simulation ...

Thanks again...

Title: Re: PRBS pattern for eye diagram USB FS driver...
Post by pancho_hideboo on Jan 25th, 2010, 1:03am


somisetty wrote on Jan 25th, 2010, 12:54am:
when i generated the Eye diagram for 2 output pins separately with Time base as 83nsec and got the below eye...
As you can see the eye is not complete,can any one let me know whats wrong with the simulation ...
I think you have some mistakes in using function for eyediagram.

What tool do you use for post processing ?

What do you mean by "fs_dp" and "fs_dm" ?

Title: Re: PRBS pattern for eye diagram USB FS driver...
Post by somisetty on Jan 25th, 2010, 1:08am

Thanks for the reply..

Iam using the tool CosmosScope by Synopsys...

fs_dm and fs_dp are input pins of the drivers and dp_out and dm_out are the outputs of the driver.


Title: Re: PRBS pattern for eye diagram USB FS driver...
Post by pancho_hideboo on Jan 25th, 2010, 1:10am

Upload your simulation data as  tr0, fsdb or psf format.
If you upload your simulation data, I can verify eyediagram.

I think you have some mistakes in using function for eyediagram.

Title: Re: PRBS pattern for eye diagram USB FS driver...
Post by somisetty on Jan 25th, 2010, 2:04am

Thanks for the help...

pls find the file... "prbs.tr0" in prbs.rar

Title: Re: PRBS pattern for eye diagram USB FS driver...
Post by pancho_hideboo on Jan 26th, 2010, 1:39am


somisetty wrote on Jan 25th, 2010, 2:04am:
pls find the file... "prbs.tr0" in prbs.rar
As I expected, there is no issue related to design in your post at all.

Your question is no more than easy usage of very specific vendor's tool.
Please post such questions to Simulator's Board not to Design's Board.

I verified your data("prbs.tr0") by Agilent ADS Post Processing Environment.
I found that a bit rate of your PRBS is 1/83nsec= 12.0482Mbps not 12.0Mbps.

Attached figure is conventional plot from your data("prbs.tr0").



Title: Re: PRBS pattern for eye diagram USB FS driver...
Post by pancho_hideboo on Jan 26th, 2010, 1:50am

Attached figure is an eyediagram for "fs_dp".

Title: Re: PRBS pattern for eye diagram USB FS driver...
Post by pancho_hideboo on Jan 26th, 2010, 1:51am

Attached figure is an eyediagram for "fs_dp_out".

Title: Re: PRBS pattern for eye diagram USB FS driver...
Post by pancho_hideboo on Jan 26th, 2010, 1:55am

See arguments of function of eye() in attached figure, although this is a function in Agilent ADS Post Processing Environment.
Here I set 1/83nsec as Bit Rate(=Symbol Rate).

Arguments of function for eyediagram are very simlar, even if you use CosmosScope of Synopsys.

Title: Re: PRBS pattern for eye diagram USB FS driver...
Post by pancho_hideboo on Jan 26th, 2010, 2:00am

Of course, I can plot an eyediagram using CosmosScope.

Show me your settings for eyediagram in CosmosScope.

Attached figure is my result.

Title: Re: PRBS pattern for eye diagram USB FS driver...
Post by pancho_hideboo on Jan 26th, 2010, 2:03am

Attached figure is an eyediagram using another settings.

Title: Re: PRBS pattern for eye diagram USB FS driver...
Post by pancho_hideboo on Jan 26th, 2010, 3:11am

BTW, why does the flat part around 1.5V exist in output waveform ?

Title: Re: PRBS pattern for eye diagram USB FS driver...
Post by somisetty on Jan 26th, 2010, 9:42pm

Thanks a lot for your time and help..

i have few doubts...in the cosmoscope settings of yours ..
you took ideal trigger not the default,would pls let me know why only ideal trigger?
how does start x value be calculated?(10n in the 1st setting and 48n in the 2nd setting..)


Pls find my settings...attached...

Thanks again...

Next time onwards i will take care to post them in simulator broads...

Title: Re: PRBS pattern for eye diagram USB FS driver...
Post by somisetty on Jan 27th, 2010, 12:40am


pancho_hideboo wrote on Jan 26th, 2010, 3:11am:
BTW, why does the flat part around 1.5V exist in output waveform ?


hi,

i think it might be due to transmission line...
Thanks

Title: Re: PRBS pattern for eye diagram USB FS driver...
Post by pancho_hideboo on Jan 27th, 2010, 3:59am


somisetty wrote on Jan 26th, 2010, 9:42pm:
i have few doubts...in the cosmoscope settings of yours ..
you took ideal trigger not the default,would pls let me know why only ideal trigger?
Attached is a function for eyediagram plot in Cadence Post Processing Environment.
You can see arguments of "eyeDiagram()" are almost same as arguments for "Ideal trigger" in CosmosScope.

The following is a function for eyediagram plot in Agilent Post Processing Environment.
http://edocs.soco.agilent.com/display/ads2009/eye%28%29

If you compare these functions from two vendors with eydiagram menu in CosmosScope,
you can understand that "Ideal trigger" is very common function for eyediagram.


somisetty wrote on Jan 26th, 2010, 9:42pm:
how does start x value be calculated?(10n in the 1st setting and 48n in the 2nd setting..)
"Start X value" is used for same purpose as "Delay" in Agilent Post Processing Environment.
I determined 10nsec and 48nsec by balancing right and left in eyediagram.

"Time base" is used for same purpose as "Cycles" in Agilent Post Processing Environment.

Why do you set "Trigger value" as 0 in "Default" ?
I don't think it is proper value.

If you use "Default" and use "fs_dm" as "Ref. signal", you should set 0.5~0.6V as "Trigger value".
Also you had better set relative large value(e.g. 200nsec>>83nsec) as "Time base".


somisetty wrote on Jan 27th, 2010, 12:40am:

pancho_hideboo wrote on Jan 26th, 2010, 3:11am:
BTW, why does the flat part around 1.5V exist in output waveform ?
i think it might be due to transmission line...
I don't think your answer make sense.



Title: Re: PRBS pattern for eye diagram USB FS driver...
Post by somisetty on Jan 31st, 2010, 9:42pm

Thanks for your help...

Title: Re: PRBS pattern for eye diagram USB FS driver...
Post by pancho_hideboo on Feb 1st, 2010, 3:45am


somisetty wrote on Jan 31st, 2010, 9:42pm:
Thanks for your help...
Apart from your very easy issue which is no more than usage of very specific vendor's tool.
I don't think your answer to the following make sense at all.

somisetty wrote on Jan 27th, 2010, 12:40am:

pancho_hideboo wrote on Jan 26th, 2010, 3:11am:
BTW, why does the flat part around 1.5V exist in output waveform ?
i think it might be due to transmission line...

I think design of your driver is not proper, although I don't know your circuit topology.


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