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https://designers-guide.org/forum/YaBB.pl Other CAD Tools >> Entry Tools >> what is vdd!* https://designers-guide.org/forum/YaBB.pl?num=1266646804 Message started by gabc on Feb 19th, 2010, 10:20pm |
Title: what is vdd!* Post by gabc on Feb 19th, 2010, 10:20pm Hello All, Can anyone please tell me what is the meaning of vdd!* vdd! is for global vdd what does that mean? And what is vdd!*? Thanks in advance |
Title: Re: what is vdd!* Post by pancho_hideboo on Feb 19th, 2010, 11:25pm The followings are general notes for you. - Always describe vendor's name and tool's name which you use. - Don't do multiple posts which are same content. - Don't request source code or behavioral model without any efforts. - There are many simulators which have analyses called as PSS, PAC and Pnoise. - Describe in detail with using correct terminologies. - Warnigns are different from Errors. - ADS is not name of simulator. - There is no tool which name is Cadence. - Don't use Direct Plot of Cadence ADE blindly without knowing definition. - All gains in Direct Plot of Cadence ADE are "right", "true" and "practical" voltage gain. - Don't mix up Simulation with Post Processing. They are completely different phase. - MATLAB are different from Simulink. - Learn measurements using actual instruments. Not "EDA Tool Play gabc wrote on Feb 19th, 2010, 10:20pm:
It means net name actually assigned for node using "Inherited Connection". So it is no more than "vdd!". |
Title: Re: what is vdd!* Post by james kerry on Jun 23rd, 2010, 12:10am Hello, They are all supply voltages. Vcc = Collector supply voltage, Vee = Emitter supply, Vdd = Drain supply, Vss = source supply. The voltages can be negative or positive depending on the the device and the circuit configuration. In circuits using NPN transistors Vcc is generally positive but if you were using PNP transistors then Vcc would be negative. In a circuit with a mixture of PNP and NPN devices Vcc take the polarity of the predominant technology used (generally it would be positive). |
Title: Re: what is vdd!* Post by bernd on Jun 23rd, 2010, 2:45am Check http://support.cadence.com and search for Quote:
and Quote:
this two documents describes the Inherited Connections, which is your vdd!*, very well. In principal it is a global net which holds a signal value which could be overwritten form top to down in your hierarchical design. Often used with multiple power supplies, but not necessarily. * |
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