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The Designer's Guide Community Forum
https://designers-guide.org/forum/YaBB.pl Simulators >> RF Simulators >> Beat frequency for a dual modulus divider https://designers-guide.org/forum/YaBB.pl?num=1268969030 Message started by panditabupesh on Mar 18th, 2010, 8:23pm |
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Title: Beat frequency for a dual modulus divider Post by panditabupesh on Mar 18th, 2010, 8:23pm Hi, I have a 2/3 dual modulus prescaler based divider. How do I decide the beat frequency for PSS simulations. I am facing convergence issues while doing PSS. Thanks, Bupesh |
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Title: Re: Beat frequency for a dual modulus divider Post by Ken Kundert on Mar 19th, 2010, 12:55am The term 'beat frequency' is a misnomer. It really should be termed the 'fundamental frequency', which in this case is the output frequency. If you divider is in 'divide by 2 mode', then the fundamental frequency is half the input frequency. If it is divider by 3 model, it is one third the input frequency. -Ken |
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Title: Re: Beat frequency for a dual modulus divider Post by panditabupesh on Mar 19th, 2010, 5:11am Ken, The dual modulus prescaler (dmp) is part of a P and S counter divider. While the S counter is decrementing the dmp is in divide by 3 mode, and for the rest P-S decrement it goes into divide by 2 mode. That means if I look at the dmp output, it keeps on changing from divide by 3 to divide by 2 mode. The output of the complete counter is periodic defined by NP+S divide. I read somewhere that beat frequency is a greatest common divisor of all the frequencies in the block. However, with a shifting frequency I can not really say that the dmp is periodic. Thanks, Bupesh |
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Title: Re: Beat frequency for a dual modulus divider Post by Ken Kundert on Mar 19th, 2010, 10:24am The fact that you are changing the divide ratio on the fly is an important fact. You'd get a usable answer more quickly and cause less frustration if you state the important facts up front. Another important fact is how the ratio is changing. Without knowing these things it is impossible to answer your question except in very non-specific ways, and so most people will not bother to respond because they know they will have to go through a long process of grilling you for the important facts, which you are not volunteering. Here is what you do. Determine the period of your circuit. Take the reciprocal. Put that number into the Beat Frequency field. If your circuit is not periodic, you cannot use RF simulation. In this case, you will have to explain what it is you are trying to accomplish. And if you do, please think about your question carefully and make sure you have given enough information so it can be answered as is. -Ken |
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Title: Re: Beat frequency for a dual modulus divider Post by Andrew Beckett on Mar 19th, 2010, 10:53am Or (still assuming it's periodic, as Ken said), you can enter the period rather than the frequency (to avoid having to take the reciprocal) - useful if the period is a nicer number than the frequency (e.g. 30ns is better than 33.333333333333333MHz). Regards, Andrew. |
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Title: Re: Beat frequency for a dual modulus divider Post by panditabupesh on Mar 19th, 2010, 2:01pm Ken, The divider is a standard dual modulus prescaler (dmp) based divider. The dmp is a synchronous counter. The dmp for an input control signal (MC) high divides by 3 and when the signal is low divides by 2. The output clock from dmp clocks two decrementing counters- call them P and S counters. When the S counter reaches zero it lowers the MC signal and dmp switches to divide by 2. When the P counter reaches zero it resets the S and P counters and the counters are reloaded. Resetting S raises MC signal. What it means is that for S value dmp is dividing by 3 (N+1) and for P-S by 2 (N). This gives the full counter a divide ratio of (N+1)*S + N (P-S) = NP+S. Why I did not mention this whole theory earlier was because I assumed that it was known (guess I was wrong). Now the fact is that dmp though clocked by an external clock, has a divide output that shifts from divide by 3 for S periods to divide by 2 for P-S periods. It is because of this reason that I am unsure about the beat frequency. Thanks, Bupesh |
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Title: Re: Beat frequency for a dual modulus divider Post by Ken Kundert on Mar 19th, 2010, 5:16pm The forum is not that large to start with, and if you restrict the question so that only people that have intimate knowledge of fractional-N synthesizers, you are talking to a very small number. So, from your answer it is still not clear what the period is. Is it S clock cycles? I cannot tell because I don't know if the state of the divider is the same after a set of S cycles. It is not clear if any of this is necessary. Perhaps if you explained what you are trying to do ... -Ken |
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Title: Re: Beat frequency for a dual modulus divider Post by pancho_hideboo on Mar 20th, 2010, 5:18am Ken Kundert wrote on Mar 19th, 2010, 5:16pm:
He means conventional Integer-N frequency divider using dual modulus prescaler(1/M and 1/(M+1)) and pulse swallowing counter(A). http://en.wikipedia.org/wiki/Dual-modulus_prescaler panditabupesh wrote on Mar 18th, 2010, 8:23pm:
panditabupesh wrote on Mar 19th, 2010, 5:11am:
panditabupesh wrote on Mar 19th, 2010, 2:01pm:
panditabupesh, what EDA vendor's simulator do you mean as "PSS" ? There are many simulators which have analysis called as PSS. Always describe vendor's name which you use as tool or simulator. Don't use a term of "beat", if you mean PSS of Cadence Spectre. See "spectre -h pss", if you mean PSS of Cadence Spectre. There is no "beat" in analysis statement for PSS of Cadence Spectre. "beat frequency" of PSS setting UI is not beat frequency. It is a "fundamental frequency" not beat frequency. I can't understand why Cadence has kept to use this expression of "beat" in PSS's setting UI. http://www.designers-guide.org/Forum/YaBB.pl?num=1232036048/4#4 I think fundamental period is (M*N+A)*Tin since all signals behave periodically with this period time. So fundamental frequency is fin/(M*N+A). |
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Title: Re: Beat frequency for a dual modulus divider Post by panditabupesh on Mar 20th, 2010, 4:35pm Hi pancho_hideboo, Yes the divider is a common integer N divider based on a pulse swallowing and dual modulus prescaler architecture. The final frequency is given by fclk/(NP+S). Now assume we are using a 2/3 (N/N+1) prescaler, and NP+S has configured to, for example, 7. That means the output frequency is fclk/7. But, if we look at the prescaler output, the frequency is changing between fclk/2 and fclk/3. Can we say that it is periodic with respect to fclk/7. Yes the shift from fclk/2 to fclk/3 is related to fclk/7, but at any time the output frequency of prescaler is no way related to fclk/7. I am using PSS from Cadence, and the UI declares it as 'Beat Frequency'. I am not facing any convergence issues (I have declared the beat/fund frequency = fclk/(NP+S) ), but I just want to be sure that in pnoise analysis I am not underestimating noise. Thanks, Bupesh |
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Title: Re: Beat frequency for a dual modulus divider Post by pancho_hideboo on Mar 21st, 2010, 12:01am panditabupesh wrote on Mar 20th, 2010, 4:35pm:
They behave periodically with time period of 7*Tclk, even if the frequency of prescaler output is changing between fclk/2 and fclk/3. panditabupesh wrote on Mar 20th, 2010, 4:35pm:
It seems you can't understand very basic theory of modulation and working mechanism of this prescaler at all. Even simple 2-FSK signal modulated by periodic signal synchronous to carrier is also periodic. All signals including the output of prescaler behave periodically with time period of 7*Tclk. panditabupesh wrote on Mar 20th, 2010, 4:35pm:
You can get convergencve with fundamental frequency=fclk/(NP+S). So fundamental period is surely (NP+S)*Tclk. panditabupesh wrote on Mar 18th, 2010, 8:23pm:
What value did you set as fundamental frequency of PSS ? panditabupesh wrote on Mar 20th, 2010, 4:35pm:
Show me logfile of simulation. |
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Title: Re: Beat frequency for a dual modulus divider Post by Ken Kundert on Mar 21st, 2010, 12:06am If it converges you should be okay. -Ken |
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Title: Re: Beat frequency for a dual modulus divider Post by pancho_hideboo on Mar 21st, 2010, 12:13am Ken Kundert wrote on Mar 21st, 2010, 12:06am:
I have to confirm "maxstep" or "maxacfreq" in PSS setting and "maxsideband" in Pnoise setting. |
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Title: Re: Beat frequency for a dual modulus divider Post by panditabupesh on Mar 22nd, 2010, 7:34am Hi pancho_hideboo, Thanks for the 2-FSK suggestion. I was intuitively expecting a fclk/3 component at the output of the prescaler. To convince myself I did a fourier series expansion of the prescaler output, and yes the output is periodic with fclk/7 (in general with fclk/(NP+S)). My convergence issues were due to some other trivial reasons- I had missed analysis=pss in a Verilog-a block. Thanks, Bupesh |
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Title: Re: Beat frequency for a dual modulus divider Post by pancho_hideboo on Mar 22nd, 2010, 7:40am panditabupesh wrote on Mar 22nd, 2010, 7:34am:
Evaluate auto-correlation function. http://www.designers-guide.org/Forum/YaBB.pl?num=1239938942/2#2 |
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Title: Re: Beat frequency for a dual modulus divider Post by Andrew Beckett on Mar 22nd, 2010, 8:29am I was a bit confused by your response, Pancho Hideboo. Did you mean "In order to confirm periodicity, you should use the auto-correlation function rather than the Fourier transform"? From what you said, it sounded as if using a Fourier transform on something that is periodic is not correct - but I'm sure that's not what you meant (if you did, perhaps you can explain why?). It's probably just an ambiguity due to English not being your first language (which I can entirely forgive; the vast majority of English spoken/written here is hugely better than I am in any other language!) Regards, Andrew. |
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Title: Re: Beat frequency for a dual modulus divider Post by pancho_hideboo on Mar 22nd, 2010, 8:32am Andrew Beckett wrote on Mar 22nd, 2010, 8:29am:
Andrew Beckett wrote on Mar 22nd, 2010, 8:29am:
This is also true for Fourier Transform. If we don't have much frequency resolution, we could miss true long fundamental period. Of course, this resolution issue is true for auto-correlation evaluation. But regarding detection of periodicity, auto-correlation Analysis is superior than Fourier Analysis, since we don't have to put importance in an accuracy of amplitude value for auto-correlation. |
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Title: Re: Beat frequency for a dual modulus divider Post by Andrew Beckett on Mar 22nd, 2010, 8:45am OK that's clear. We are in agreement - it was just your statement could have been interpreted to mean that one shouldn't use a Fourier Transform (or Fourier Series expansion) on a periodic response, but that isn't what you meant. Regards, Andrew. |
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Title: Re: Beat frequency for a dual modulus divider Post by Ken Kundert on Mar 22nd, 2010, 9:04am The most practical and sensitive method I have found for checking periodicity with a circuit simulator is to use strobing and set the strobe period to the expected period. Then run a transient simulation for many cycles and plot the results. Look at the waveforms at a variety of nodes. A particularly good signal to look at is the supply current. If they all become constant valued, then the system is periodic in the given period. I have used this method to find subtle oscillations and small amounts of chaotic behavior for dead-zones that have prevented convergence of PSS. But again, I only do this to determine why PSS is not converging. I have always found that if PSS converges, you have the right period. -Ken |
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Title: Re: Beat frequency for a dual modulus divider Post by Andrew Beckett on Mar 22nd, 2010, 9:33am Ken, I agree with you. The autocorrelation function is primarily useful (in my opinion) for looking for patterns in what you might otherwise expect to be random data. I would never use it as a check for periodicity in a circuit I was to simulate with PSS. I was just trying to figure out what Pancho Hideboo was saying... Regards, Andrew. |
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