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https://designers-guide.org/forum/YaBB.pl Design Languages >> VHDL-AMS >> troubles with wait instruction (VHDL) https://designers-guide.org/forum/YaBB.pl?num=1271870268 Message started by happy_designer on Apr 21st, 2010, 10:17am |
Title: troubles with wait instruction (VHDL) Post by happy_designer on Apr 21st, 2010, 10:17am Hello, I'm trying to write the code of a pwm generator in VHDL. The entity "pwm_generator" takes : duty value as input, frequency and number of step (for one period) as generic parameters It should return a pwm signal depending on the duty value. My problem comes since I'm trying to make it as generic as possible. Then I try to calculate a clock period with the generic parameters (frequency, nb_of_steps and duty) and I want to use this result as a parameter of a wait instruction. In this case, the simulator is blocked in infinite loop as he waits 0.0 sec in my loop. Is there a simple solution for this problem ? (can we force the calculation of v_delay ??) Thanks P.C entity pwm_generator is generic ( cst_nb_step : natural := 255 ; frequency : natural := 40000 ); port( duty_value : in natural ; pwm : out std_logic ); end entity pwm_generator ; architecture beh of pwm_generator is signal s_clock : std_logic := '0' ; signal s_pwm : std_logic := '0' ; signal s_delay : real := 0.0 ; begin process variable v_delay : time := 500 us ; begin v_delay := (1/frequency/cst_nb_step * 1 sec ) ; s_clock <= not(s_clock) ; wait for v_delay ; -- works correctly with 500 us value end process ; process(s_clock) variable counter, ratio : natural := 0 ; begin ratio := ( duty_value * cst_nb_step / 100 ) ; if (counter /= 255) then if (counter >= ratio) then s_pwm <= '0' ; elsif (counter < ratio) then s_pwm <= '1' ; end if ; counter := ( counter + 1) ; elsif (counter = 255) then counter := 0; s_pwm <= '1' ; end if; end process ; pwm <= s_pwm ; end architecture beh ; |
Title: Re: troubles with wait instruction (VHDL) Post by jerome_ams on Oct 26th, 2010, 8:30am Hi, As you do not dynamically change the v_delay value (it is calculated from generics), I would suggest to take its description out of the process and to declare it as a constant: constant v_delay : time := 1/frequency/cst_nb_step ; This way v_delay will be calculated. Hope it helps, Jerome |
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