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https://designers-guide.org/forum/YaBB.pl Design >> High-Power Design >> State-space average modelling of converters with parasitics and storage-time.... https://designers-guide.org/forum/YaBB.pl?num=1272361054 Message started by somisetty on Apr 27th, 2010, 2:37am |
Title: State-space average modelling of converters with parasitics and storage-time.... Post by somisetty on Apr 27th, 2010, 2:37am Hi all, can anyone provide me the below paper? Thanks a lot.... State-space average modelling of converters with parasitics and storage-time modulation Polivka, W. M.; Chetty, P. R. K.; Middlebrook, R. D. In: PESC '80; Power Electronics Specialists Conference, Atlanta, Ga., June 16-20, 1980, Record. (A81-32951 14-33) New York, Institute of Electrical and Electronics Engineers, Inc., 1980, p. 119-143. Research sponsored by the IBM Corp.; The method of state-space averaging is used to extend the models of buck, boost, buck-boost, and Cuk (1977) converters to include the effects of all parasitic resistances and transistor storage-time modulation. The validity of the technique is emphasized through experimental verification of a new effect in the Cuk transformer, a right half-plane zero in the line to output transfer function. Practical consequences of the results obtained are discussed. Keywords: CHARGE DISTRIBUTION, MATHEMATICAL MODELS, STORAGE STABILITY, SWITCHING CIRCUITS, TIME RESPONSE, VOLTAGE CONVERTERS (DC TO DC), COMPUTERIZED SIMULATION, HALF SPACES, MODULATION, POWER CONDITIONING, STATE VECTORS, TRANSFER FUNCTIONS, TRANSFORMERS, VOLT-AMPERE |
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