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Analog Verification >> Analog Functional Verification >> Analog verification needs vs digital
https://designers-guide.org/forum/YaBB.pl?num=1280413371

Message started by love_analog on Jul 29^th, 2010, 7:22am

Title: Analog verification needs vs digital
Post by love_analog on Jul 29^th, 2010, 7:22am

Digital verification teams talk about 2 things that I *believe* are not standard in AMS methodologies

a) random testing
b) coverage metrics.

Other things are covered well - top-down and directed functional verification.

What are these and what can be done to provide them as a standard flow for AMS validation.

Ken, I don't know if this should be part of this forum or another so I'll post in the other board as well.

Title: Re: Analog verification needs vs digital
Post by jbdavid on Nov 10^th, 2010, 11:44pm

Randomized testing is required when development of directed tests to support all cases will take too long, where could be useful in Analog verification is for packet generation for end-end testing of a mixed signal/ rf PHY.

or at block level model verification when simulating all combinations of the digital controls is impossible vs the schematic - but if there are that many controls you are probably writing your model at the wrong level.

Code, and (especially) TEST/ Feature coverage are essential. Of course you'll run these tests on the verification model of the design, without any actual transistors in the simulation.
IMO , if your AMS/RF verification team is NOT using coverage metrics to find the holes in their tests, and your chip/ip block is more than 1 integer pll or ADC/DAC, you are probably wasting $$ if you pay to get masks made, and order silicon!

thats this man's opinion!