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Other CAD Tools >> Physical Verification, Extraction and Analysis >> Usefulness of Substrate Noise Anaysis
https://designers-guide.org/forum/YaBB.pl?num=1298269268

Message started by bobbie on Feb 20^th, 2011, 10:21pm

Title: Usefulness of Substrate Noise Anaysis
Post by bobbie on Feb 20^th, 2011, 10:21pm

Does anyone have any positive experiences using QRC RC + SNA (Substrate Noise Analysis) extracted netlists for real circuit simulations (other than a simple s-parameter point-to-point measurement) such as measuring the VCO output power (dBm) as related to a noise source up-mixing with various isolation schemes? While I can see the up-mixing, what I can't do is correlate the peak osc power nor that the of up converted noise. Not close. Also, having trouble with convergence. Doing both transient with DFT and HB analysis. With this difficulty, I don't see much value in SNA for circuit simulations. Hopefully, someone has better experiences or suggestions.