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General >> Opportunities >> Lead Developer, Physical Verification
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Message started by latha on Feb 22^nd, 2011, 6:52pm

Title: Lead Developer, Physical Verification
Post by latha on Feb 22^nd, 2011, 6:52pm

Hi All,

We are looking for :Lead Developer, Physical Verification

 This position is expected to be highly experienced (8-10 years). The experience can be in one or more of the following three areas (in order of preference): (i) EDA methodology/flow development (ii) EDA vendor AE (iii) Digital design engineer. He/she should have expert working knowledge of the design flow and relevant EDA tools (Cadence expertise preferred) in the domain.
 Should have solid understanding of DRC and LVS checking. This includes understanding the description of silicon technology DRC rules, their coding in rule decks and robust DRC/LVS methodologies to enable error free PGs.
 Should have worked on DRC/LVS analysis of production designs to enable good understanding of third party tools. Cadence PVS experience preferred.
 Tools: Preferable to have work experience with Cadence tools, but experience with other tools too would be considered.
 Scripting and software languages: Perl / Tcl / C++

Pls send the cv to hr@callidasoft.com

Thanks