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https://designers-guide.org/forum/YaBB.pl Simulators >> Circuit Simulators >> Questions on Hercules netlist to spice conversion https://designers-guide.org/forum/YaBB.pl?num=1313764723 Message started by lhlbluesky_lhl on Aug 19th, 2011, 7:38am |
Title: Questions on Hercules netlist to spice conversion Post by lhlbluesky_lhl on Aug 19th, 2011, 7:38am i use hercules + star-RC to extract the layout netlist, but the ideal netlist generated by star-RC has some problems: for example, i have one subckt AAA, it has three ports: IN OUT BIAS, but the translated ideal netlist has more ports as follows: .subckt AAA IN OUT BIAS ln_N_27 ln_N_31 ln_N_33 ln_N_35 ************* .ends AAA ******* XI2 IN1 OUT1 BIAS1 GNDA1 GNDA1 GNDA1 GNDA1 AAA the additional ports ln_N_27, ln_N_31, ln_N_33, ln_N_35 don't exist in my layout at all, and all the additional ports connect to GNDA when instancing. such subckt which has additional ports(ln_N_*) is more than one. i want to know, why are the additional ports (ln_N_*) generated in netlist? is it caused by nettran? and how to solve this problem? besides, can anyone use synopsys tools XA for simulation? in XA's BA(back annotation) flow, first, i use hercules + starrc to extract the ideal netlist (ideal.sp) and parasitic included netlist (top.spf), then i use BA flow for layout post-simulation. but i have a question here, in the ideal netlist, there is many additional nets (ln_N_*) which is not used in my layout at all as above mentioned. another aspect, the BA back annotation rate (back annotation without error) is not 100%, there are many nets not back annotated correctly, and these nets exist in resistor, for example, i have a big resistor (l=30u w=1u) which has three segments: the ideal netlist is: XRR1 OUT OUTN1 rpmpoly2t l=10u w=1u XRR2 OUTN1 OUTN2 rpmpoly2t l=10u w=1u XRR3 OUTN2 OUTN rpmpoly2t l=10u w=1u but the spf netlist is: XRR1 XI23/XRR1:A XI23/XRR1:B rpmpoly2t l=10u w=1u XRR2 XI23/XRR2:A XI23/XRR2:B rpmpoly2t l=10u w=1u XRR3 XI23/XRR3:A XI23/XRR3:B rpmpoly2t l=10u w=1u and these nets (XI23/XRR1:A XI23/XRR1:B XI23/XRR2:A XI23/XRR2:B XI23/XRR3:A XI23/XRR3:B) cannot be correctly back annotated, what is the reason? can anyone has the same experience before? thanks all for reply in advance, thanks. |
Title: Re: Questions on Hercules netlist to spice conversion Post by lhlbluesky_lhl on Aug 20th, 2011, 7:25am has anyone met this problem before? can anyone help me? thanks. |
Title: Re: Questions on Hercules netlist to spice conversion Post by Geoffrey_Coram on Aug 22nd, 2011, 10:23am I've never had this problem before. The "ln_" in some tools means something like "layout net" -- a net that exists because one of your schematic nets was split in the layout due to parasitic resistance. |
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