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Design >> High-Speed I/O Design >> How will Jitter tolerance mask be decided?
https://designers-guide.org/forum/YaBB.pl?num=1319432514

Message started by yosh-d on Oct 23^rd, 2011, 10:01pm

Title: How will Jitter tolerance mask be decided?
Post by yosh-d on Oct 23^rd, 2011, 10:01pm

Hi All

There are jitter tolerance mask in the various specifications. I'd like to know how Jitter tolerance is spcified regarding to the following items;
1)There are several stye to specify the frequency at crosspoint between low and high frequency. e.g. fb/1667 and fb/2000.
2)Also the floor of SJ tolerance are different in each specs. e.g. 0.05UI in OIF and 0.2UI in USB3.
3)In the OIF Spec. jitter tolerance mask is zigzag trace. why?

I'd like to know base idea to specified them.

Title: Re: How will Jitter tolerance mask be decided?
Post by loose-electron on Oct 24^th, 2011, 3:22pm

Define your problem or question with specifics please.
It is not clear what you are asking.
Drawings, a link to a specification something that can be used to understand the question.