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Measurements >> Phase Noise and Jitter Measurements >> question about PLL reference phase noise
https://designers-guide.org/forum/YaBB.pl?num=1320290246

Message started by lonemy on Nov 2^nd, 2011, 8:17pm

Title: question about PLL reference phase noise
Post by lonemy on Nov 2^nd, 2011, 8:17pm

Hello everyone:

I have a question about PLL reference clock.
if we have two reference clock, the phase noise spec and frequency are the same and the only difference is the output clock power. use these two clock as one PLL reference, how will the PLL performance change?

PS: I think that different output power and the same phase noise
->the absolute power of phase noise will be different
->the PLL output phase noise caused by reference will be different
->but this will contradict to Ken's paper "predicting the phase noise and jitter of PLL-Based frequency synthesizers"

Thanks!

Title: Re: question about PLL reference phase noise
Post by raja.cedt on Nov 4^th, 2011, 2:58am

hello could you please reframe your Question?

Up to my understanding there will some time two reference sources like multi std serdes. there you have support from many standards, like some stnds needs 100meg where as others might require 156.25meg...etc

but my question is why you are saying o/p power changes when you change the reference frequency (o/p power compltely depends on VCO and if there is any level converter).

could you please explain whats the exact contradiction?

Thanks,
raj.

Thanks,
raj.

Title: Re: question about PLL reference phase noise
Post by lonemy on Nov 5^th, 2011, 2:24am

I'm sorry I did not explain this question clearly.
if we have two clocks, their output amplitudes are different(eg. one is 1V and another is 2V) but the phase noise are the same(eg. -100dBc/Hz@10K, -120dBc/Hz@100K, -150dBc/Hz@1M).
then we use these two clock as two PLL's reference respectively, the other part of these two PLL are the same to each other.
how about these two PLL output phase noise? (same or different?)

Thanks for your time~ :)

Title: Re: question about PLL reference phase noise
Post by raja.cedt on Nov 5^th, 2011, 4:08am

hello,
So your Question is you have two diferent reference clocks with diferent amplitudes with same Phase noise (it is very rare case because same ferquency and diferent amplitude so getting same noise is rare at least upto my knoeledge). So as far as impact of reference Phase noise at the o/p of the PLL, only TF from ref to o/p and ref Phase noise matters.

One more thing refclk amplitude doesn't matter if your Pfd is working fine with that level.

Thanks,
raj.

Title: Re: question about PLL reference phase noise
Post by lonemy on Nov 6^th, 2011, 7:19pm

Hello raja:

Thank you very much!