Title: VHDL execution error
Post by bugmenot on Jan 19th, 2012, 2:22pm
Hi all!!
We're having some problems with a finite-state machine in VHDL. When a
button is pressed, it is supposed to go to its corresponding state, but
the only thing we obtain in the simulation is that, if we press the BTN1
button, we go to the "0001" state, all right, but after that, if we
press any other button, although button BTN1 is not pressed, the state
machine goes to the "0001" state, ergo, the state of the BTN1 button.
Attached you have the behavioral source of our finite-state machine. Although the file attached is a .jpg, just change the extension of the file to .vhd or to .txt so see the source.
Hope you can help us.
P.S. We are using Xilinx ISE 11.4 Design Suite.
Thank you all!!
Code:
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
---- Uncomment the following library declaration if instantiating
---- any Xilinx primitives in this code.
--library UNISIM;
--use UNISIM.VComponents.all;
entity Maquina_Estados is
Port ( BTN1 : in STD_LOGIC;
BTN2 : in STD_LOGIC;
BTN3 : in STD_LOGIC;
BTN4 : in STD_LOGIC;
BTN5 : in STD_LOGIC;
BTN6 : in STD_LOGIC;
BTN7 : in STD_LOGIC;
CLK : in STD_LOGIC;
RST : in STD_LOGIC;
TBE : in STD_LOGIC;
output : out STD_LOGIC_VECTOR (7 downto 0);
wr : out STD_LOGIC);
end Maquina_Estados;
architecture Behavioral of Maquina_Estados is
signal E: STD_LOGIC_VECTOR (3 downto 0):="0000";
signal ascii_cod: STD_LOGIC_VECTOR (7 downto 0);
begin
U: PROCESS (CLK, RST, BTN1, BTN2, BTN3, BTN4, BTN5, BTN6, BTN7)
BEGIN
IF (RST='1') then E<="0000";
ELSIF (rising_edge(CLK)) then
case (E) is
--when "0000" => --E <= "0111" when BTN7='1' else
-- "0110" when BTN6='1' else
-- "0101" when BTN5='1' else
-- "0100" when BTN4='1' else
-- "0011" when BTN3='1' else
-- "0010" when BTN2='1' else
-- "0001" when BTN1='1' else
-- "0000";
when "0000" => if (BTN7='1') then E <= "0111"; end if;
if (BTN6='1') then E <= "0110"; end if;
if (BTN5='1') then E <= "0101"; end if;
if (BTN4='1') then E <= "0100"; end if;
if (BTN3='1') then E <= "0011"; end if;
if (BTN2='1') then E <= "0010"; end if;
if (BTN1='1') then E <= "0001"; end if;
when "0001" => ascii_cod<= "01110111";
if TBE='1' then E <="1000"; end if;
when "0010" => ascii_cod<= "01110011";
if TBE='1' then E <="1000"; end if;
when "0011" => ascii_cod<= "00100000";
if TBE='1' then E <="1000"; end if;
when "0100" => ascii_cod<= "00011011";
if TBE='1' then E <="1000"; end if;
when "0101" => ascii_cod<= "01101101";
if TBE='1' then E <="1000"; end if;
when "0110" => ascii_cod<= "01100001";
if TBE='1' then E <="1000"; end if;
when "0111" => ascii_cod<= "01100100";
if TBE='1' then E <="1000"; end if;
when "1000" => E <="1001";
when "1001" => if TBE='1' then E <="0000"; end if;
when others => E <="0000";
end case;
end if;
END PROCESS U;
WITH E SELECT
WR<= '1' when "1000",
'0' when others;
WITH E SELECT
output<= ascii_cod when "0001",
ascii_cod when "0010",
ascii_cod when "0011",
ascii_cod when "0100",
ascii_cod when "0101",
ascii_cod when "0110",
ascii_cod when "0111",
ascii_cod when "1000",
ascii_cod when "1001",
ascii_cod when others;
end Behavioral; |
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