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Other CAD Tools >> Physical Verification, Extraction and Analysis >> how can i use asitic to simulate and design the PGS inductor on chip
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Message started by coolliu on Jul 17^th, 2012, 7:09pm

Title: how can i use asitic to simulate and design the PGS inductor on chip
Post by coolliu on Jul 17^th, 2012, 7:09pm

hi everybody!
I'm a new guy for designing the ic.Now i want to design a PGS(Patterned Ground Shields) inductor on si chip. can i use the ASITIC to design PGS and get the parasitic parament .where can i get the TMSC18.Tek FILE.
thank you for your concern.