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Analog Verification >> Analog Performance Verification >> SC Amp PSS/PNOISE Noise simulation using jittery clock and noisy power-supply
https://designers-guide.org/forum/YaBB.pl?num=1360163355

Message started by Akbar on Feb 6^th, 2013, 7:09am

Title: SC Amp PSS/PNOISE Noise simulation using jittery clock and noisy power-supply
Post by Akbar on Feb 6^th, 2013, 7:09am

Hi All,

I need to do SC Amplifier PSS/PNOISE Noise simulation using jittery clock and noisy power-supply/common-mode/diff-input signal to check the noise folding due to mixing at output of SCA at relatetively low frequency (<100Hz). My clock speed is around 125MHz.

My questions are following:

1. Is it possible to do so independent of simulator?
2. If it is possible, using spectre-RF+APS, do i need any special testbench setup or just usual PSS/PNOISE setup (including input source port and output probe instance) is fine.

Best Regards,
Akbar Momin