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Simulators >> AMS Simulators >> digital output keeps 0 in spectreverilog simulation
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Message started by ahhfyz on May 11^th, 2013, 6:51am

Title: digital output keeps 0 in spectreverilog simulation
Post by ahhfyz on May 11^th, 2013, 6:51am

Hi! I have used spectreverilog simulator before. Today I simulate a mixed-signal circuit again. The analog part works well, but all the digital output keeps "0". How does this happen? What should I do ?Thank you!

Title: Re: digital output keeps 0 in spectreverilog simulation
Post by boe on May 14^th, 2013, 6:38am

ahhfyz,
probably there is something wrong with the IEs (power supply, thresholds, ...).
- B O E