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Other CAD Tools >> Physical Verification, Extraction and Analysis >> psub_StampErrorFloat- Assura LVS
https://designers-guide.org/forum/YaBB.pl?num=1372231677

Message started by aki on Jun 26^th, 2013, 12:27am

Title: psub_StampErrorFloat- Assura LVS
Post by aki on Jun 26^th, 2013, 12:27am

Please Help!!

I am working on a low noise amplifer (LNA). In the schematic I used rplpoly_rf resistors of TSMC foundary. I generated the layout from Tools-> Design synthesis -> Layout XL. My DRC was cleared and LVS as well. However, Error Layer Window (ELW) popped up and pointing to every resistor that "psub_StampErrorFloat". I have no idea how to solve it. Could you please help me to solve this?

Thank you so much.

Title: Re: psub_StampErrorFloat- Assura LVS
Post by purplewolf on Jun 26^th, 2013, 3:39am

Either your psub is floating or you have to draw its layers by yourself in layout and then connect it to ground.

Title: Re: psub_StampErrorFloat- Assura LVS
Post by bernd on Jul 1^st, 2013, 3:52am

Your “rppoly_rf” resistor is probably a 3 terminal resistor which needs to be connected
with the 3rd terminal to PWell or Psub. For some cases VXL cannot handle and does not
recognize such connections automatically.
Check if you need a 3rd connection to PWell or Psub with the resistor and
if this connection exist in your layout.
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