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Other CAD Tools >> Physical Verification, Extraction and Analysis >> post pex simulation: specre netlist versus calibre netlist
https://designers-guide.org/forum/YaBB.pl?num=1374073171

Message started by nereo on Jul 17^th, 2013, 7:59am

Title: post pex simulation: specre netlist versus calibre netlist
Post by nereo on Jul 17^th, 2013, 7:59am

Hello everyone,

i'been experiencing some difference in spectre simulation results depending on which type of post pex netlist is created.

to track down the problem i've created a simple testbech.

My schematic is a capacitor with a switch transistor connected at the bottom plate. I've created a DRC and LVS clean layout.

I first do a PEX creating a calibreview output. Then i do a PEX creating only a spectre netlist output. Both PEX are same.

After a s-parameter simulation in order to check the capacitance seen at the top plate I gete a 70 aF difference depending which netlist is used. (NMOS switch with grounded source and bulk is turned on).

Where could this difference come from? Please help me with some suggestions... :)

Thanks in advance

Title: Re: post pex simulation: specre netlist versus calibre netlist
Post by boe on Jul 23^rd, 2013, 3:48am

nereo,
are the sim netlists the same?
- B O E

Title: Re: post pex simulation: specre netlist versus calibre netlist
Post by nereo on Aug 5^th, 2013, 1:24am

Dear BOE,

thank you for your answer. Sorry for a late reply...i'll be faster from now on :)

The netlists are different in terms of port node naming, but are the same when I compare the values of parasitic capacitors and resistors. Also, the device parameters and their values are the same.

nereo

Title: Re: post pex simulation: specre netlist versus calibre netlist
Post by boe on Aug 9^th, 2013, 1:43am

nereo,

logically identical netlists should give the same results. I suppose you already checked that you used the same simulator settings.

Is it possible that this is just numerical error (eg. [numerically] unstable initial conditions, ...)?

- B O E