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Modeling >> Behavioral Models >> Random DC Voltage Source Simulation help needed
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Message started by Tanvir on Feb 14^th, 2014, 8:30pm

Title: Random DC Voltage Source Simulation help needed
Post by Tanvir on Feb 14^th, 2014, 8:30pm

Hi there,

I am trying to simulate mismatch in a 10 bit D/A converter and unfortunately my PDK does not support Monte Carlo Simulation.

At least to simulate the threshold voltage mismatch I am trying to create a voltage source or a set of voltage sources which will generate random voltage each time I run the transient simulation in Cadence Spectre ADE.

Then I can connect the bias node to the variable source and then to the gate of the current source to observe the threshold voltage effect.

It is a bit urgent for me to come up with the idea to do this. It would be great if you could advice me how can I do this in Verilog A to run it in Cadence ADE?

Regards,

Tanvir

Title: Re: Random DC Voltage Source Simulation help needed
Post by Andrew Beckett on Feb 16^th, 2014, 12:52am

Create an include file called (say) stats.scs containing:

statistics {
process {
vary mydc dist=gauss std=1u
}
}

Then have your voltage source in your schematic with a dc value of "mydc". In ADE you'll end up with a Design Variable called mydc - set the value of that to the mean value you want (the 1u in the file above is the standard deviation, so set that to what you want). Use Setup->Model Libraries to include the stats.scs file.

Then in ADE XL (if in IC61X) set the run mode to Monte Carlo, or if in IC5141 you'd do this from ADE via Tools->Monte Carlo.

Regards,

Andrew.

Title: Re: Random DC Voltage Source Simulation help needed
Post by boe on Feb 18^th, 2014, 10:54am

Hi Tanvir,
Cadence Solution ID 11213354 (see also here) may be helpful for you.
- B O E

Title: Re: Random DC Voltage Source Simulation help needed
Post by Tanvir on Mar 2^nd, 2014, 3:58am

Hallo,

Thank you very much for your suggestion Andrew and BOE. Sorry for my late reply.

Kind regards,

Tanvir

Title: Re: Random DC Voltage Source Simulation help needed
Post by Sherif on Aug 25^th, 2016, 4:39am

I'm facing the same trouble but I don't need to run an MC simulation. However I want to have, at the end, a voltage source that will generate random values between two limits and with a timestep between each.
I don't know if the method Andrew proposed would work for my case.

What I would do is to generate a file that has time value pairs and give that to the pwlf source. But I don't like this solution, sounds pretty basic. Does anyone have something in mind?

Title: Re: Random DC Voltage Source Simulation help needed
Post by Geoffrey_Coram on Aug 25^th, 2016, 1:08pm

Andrew's suggestion is for a different situation than what you want.

What's wrong with the pwlf source you suggest? "basic" isn't "bad" in my book. Although your situation, where the voltage jumps around, could cause convergence problems, regardless of how you implement it.

Title: Re: Random DC Voltage Source Simulation help needed
Post by Sherif on Aug 26^th, 2016, 3:34am

Thanks Geoffrey for your input. I have already implemented what I suggested and works. :)