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Design >> RF Design >> LC-PLL ripples on Control Voltage signal path
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Message started by analog_design on Apr 24^th, 2014, 9:46am

Title: LC-PLL ripples on Control Voltage signal path
Post by analog_design on Apr 24^th, 2014, 9:46am

Hi All,

When I am simulating PFD + CP + LPF + LC-VCO. I see 50mV ripples on control voltage line which is controlling varactor. My lpf has very less capacitor of 15pF due to high bandwidth.

Did any body face this issue and What would be solution to it ? I am suspecting it is due to asymmetric voltage of differential vco which kick back on control line.

One observation is If I sum up both differential signals of lc-vco ( this will give me asymmetric voltage) and calculate frequency. Then This frequency same as ripple voltage frequency. Ripple freq is 5GHz and my fundamental frequency is 2.55GHz

Title: Re: LC-PLL ripples on Control Voltage signal path
Post by rajasekhar on Apr 24^th, 2014, 11:55am

Hi,
This is typical 2nd harmonic leakage in any differential circuit, even in a perfectly balanced differential pair also you would see 2nd harmonic at tail node. So this is not new problem.
Coming to PLL how does 5Ghz ripple bothers you, if not mistaken the highest Bandwidth I have seen around 200MhZ (in case of reference less CDR ). You may see very less AM-PM conversion in case of you have wide tuning range or highly non linear varactor.

Thanks,
Raj.