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Design >> Mixed-Signal Design >> Can I filter Jitter?
https://designers-guide.org/forum/YaBB.pl?num=1405929070

Message started by SNIKE on Jul 21^st, 2014, 12:51am

Title: Can I filter Jitter?
Post by SNIKE on Jul 21^st, 2014, 12:51am

Hi members,
We have a System clock running at 120MHz, it has 300pS peak to peak jitter. :'(
I am designing a pipeline ADC and my sampling frequency is 1MHz.
I found that due to aperture uncertanity [jitter] my ADC's performance is limited.

Since my sampling frequency is much slower than my main noisy System clock, can I do somekind of filtering and create a new clean Clock?
what other methods can I use to improve jitter at low frequencies?

Thanks in advance.

Title: Re: Can I filter Jitter?
Post by loose-electron on Jul 21^st, 2014, 11:28am

You can run a noisy clock into a PLL and get something out of the PLL that averages out the the mean value of the clock coming in, as a function of the PLL bandwidth.

Filter jitter? No.
Process a jittery clock to get something with less jitter? Yes.

I would look into cleaning up your system clock first, somewhere upstream there is a clean clock tied to a crystal.

Title: Re: Can I filter Jitter?
Post by SNIKE on Jul 21^st, 2014, 11:41am

Thanks for reply.

The system clock is a relaxation oscillator. I am not very familiar with clock design. But I guess relaxation oscillators are usually very noisy.
Is 300pS OK for relaxation oscillator? Is there some scope of improvement there?

"You can run a noisy clock into a PLL and get something out of the PLL that averages out the the mean value of the clock coming in, as a function of the PLL bandwidth."

Any prior publications which do this? Do I need a very accurate VCO to design this?

Title: Re: Can I filter Jitter?
Post by carlgrace on Jul 22^nd, 2014, 5:34pm

SNIKE wrote on Jul 21^st, 2014, 11:41am:

"You can run a noisy clock into a PLL and get something out of the PLL that averages out the the mean value of the clock coming in, as a function of the PLL bandwidth."

Any prior publications which do this? Do I need a very accurate VCO to design this?

Any good text on PLL design will discuss this principle. You do not need a very accurate VCO because the loop high-pass filters the VCO jitter wrt the output of the PLL. (in this narrow sense you can filter jitter, but I'm not contradicting loose-electron).

Title: Re: Can I filter Jitter?
Post by loose-electron on Jul 24^th, 2014, 7:05pm

Get rid of the relaxation oscillator and go to a crystal based oscillator.

Before you try anything else.

Using a crystal should fix your problems.