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Design >> Mixed-Signal Design >> LDMOS transistors as inverters
https://designers-guide.org/forum/YaBB.pl?num=1413892391

Message started by Tako on Oct 21^st, 2014, 4:53am

Title: LDMOS transistors as inverters
Post by Tako on Oct 21^st, 2014, 4:53am

Hello,

I have the following question: is it possible to construct an inverter using LDMOS transistors when HV power supply is equal to 30 V and maximum VGS for LDMOS transistors is 5 V? Moreover, lower MV domain is 5 V.

See the attachment for visualization - problem section.

I can do following solution - see the attachment (solution section). However, doing it means constant current consumption and problems to turn on PMOS (apply 25 V on its gate). PMOS is turned on through 5R resistor.

Do you know if it is possible to construct such an inverter?

EDIT: it must be an integrated circuit solution.

Title: Re: LDMOS transistors as inverters
Post by boe on Oct 21^st, 2014, 9:00am

Tako wrote on Oct 21^st, 2014, 4:53am:

I'm sure it is possible.
I'd suggest a standard level shifter with gate protection.
- B O E

Title: Re: LDMOS transistors as inverters
Post by loose-electron on Oct 21^st, 2014, 11:31pm

put a switch on the bottom of that 5R resistor to ground and you are good to go. Just use a HV transistor to do it due the Vds voltage being high when the grounding switch is open.

Title: Re: LDMOS transistors as inverters
Post by Tako on Oct 22^nd, 2014, 2:56am

loose-electron wrote on Oct 21^st, 2014, 11:31pm:

put a switch on the bottom of that 5R resistor to ground and you are good to go. Just use a HV transistor to do it due the Vds voltage being high when the grounding switch is open.

Yes, it resolves the current consumption for high state, but still there is a power consumption for low state. However, the solution is good. I think that I'll put resistor on top of 5R resistor, thus PMOS should be turned on faster.

Title: Re: LDMOS transistors as inverters
Post by Tako on Oct 27^th, 2014, 4:54am

Hi,

The modification of the solution, that is, resistor divider with a switch is a good one :). Time to turn the PMOS on and constant current through the resistor divider is a trade-off, however it works fine. I do not have any better solution right now.

And one remark. Put the transistor on the bottom as loose-electron said. No body-effect is present (when using NMOS transistor) and layout will be easier. It really does not matter where the switch is located.

Thanks for the discussion.

Title: Re: LDMOS transistors as inverters
Post by RobG on Oct 31^st, 2014, 8:20am

I believe this circuit is what you are looking for:

In this case VDDL would be 5V and VDDH would be 30V. It takes no static current but the drain of the NMOS will need to handle 30V.

rg

Title: Re: LDMOS transistors as inverters
Post by boe on Nov 3^rd, 2014, 1:46am

RobG,
the standard circuit you propose applies full VDDH across the oMOS gate oxide (GS); so they require some protection if the are 5V gates.
- B O E

Title: Re: LDMOS transistors as inverters
Post by RobG on Nov 3^rd, 2014, 3:41am

boe wrote on Nov 3^rd, 2014, 1:46am:

RobG,
the standard circuit you propose applies full VDDH across the oMOS gate oxide (GS); so they require some protection if the are 5V gates.
- B O E

Whoops, you are correct. I didn't see the vgs requirement.

Title: Re: LDMOS transistors as inverters
Post by Tako on Nov 3^rd, 2014, 6:14am

RobG wrote on Nov 3^rd, 2014, 3:41am:

boe wrote on Nov 3^rd, 2014, 1:46am:

RobG,
the standard circuit you propose applies full VDDH across the oMOS gate oxide (GS); so they require some protection if the are 5V gates.
- B O E

Whoops, you are correct. I didn't see the vgs requirement.

That's right. The circuit you proposed cannot be used in my case.

Just as a summary, see the attached picture.

I worried about the current flowing in the resistor divider, but it is not as bad as I thought. 500 uA for 100 kHz output signal works perfectly. Input capacitance of transistors is on the level of few fF. Very big transistors can achieve the input capacitance equal to single pF, but the chosen current of the voltage divider can turn on/off the PMOS relatively fast.

The only remark I have is the fact that, when output goes low, there can be undershoot on the gate of PMOS and its gate-source voltage can go lower than 25 V. It can be solved simply by driving output PMOS and NMOS transistors using no overlaping clock.