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Design >> Analog Design >> URGENT NEED FOR HELP: Designing a transconductor circuit and 2nd order voltage m
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Message started by OTA-Be on Dec 23rd, 2014, 11:17am

Title: URGENT NEED FOR HELP: Designing a transconductor circuit and 2nd order voltage m
Post by OTA-Be on Dec 23rd, 2014, 11:17am

Here is my question about how to design the circuit in the attached file.
How can I design the transconductor circuit and 2nd order voltage mode low pass filter, using the designed circuit in the first step.
Mainly I want to know how to design the circuit for Vbias and Iref??? Should I design the MOSs with different W, Ls?
I need an urgent help!!!
Thanks a lot!

Title: Re: URGENT NEED FOR HELP: Designing a transconductor circuit and 2nd order voltage m
Post by Novaris on Dec 23rd, 2014, 4:41pm

Hi

I don't understand your question. The picture shows a rather basic folded cascode OTA with seperate biasing branches for the output for (I assume) common mode regulation.

The MOS will for sure have different W and Ls. Inputs will be rather wide (if offset and speed are not critical even weak inversion), cascodes will also have high gm whereas current sources will be designed as such to have the lowest gds with the allowable output voltage range. The bias voltages for the cascodes should ensure vds of the current sources is above vdsat.

If you have a look at a MOS design book you will for sure find further information on how to design an OTA.

BR

PS:
Beware of the biasing concept: the OTA in the picture only has a gain of gm, not 2*gm, because the left output branch is neither diode connected and fed to the output nor used as an output. So only the current change in M2 affects the output, not the change on M1. A change in M1 will only shift the source voltage of the differential pair and this change goes with gm to the output.

The reference currents are limiting your slew rate so this parameter would be the disgn target.

Please post the total schematic in order to get more help.

Title: Re: URGENT NEED FOR HELP: Designing a transconductor circuit and 2nd order voltage m
Post by analog_rf on Dec 26th, 2014, 10:22am

All the bias voltages Vb1,Vb2 etc will be generated using a diode connected transistor. Feed some current into a diode connected tran and it will give out some vgs and use this as a bias to the cascode as well as main tran. Regarding Iref, you can use a const current source for the moment. In any chip Iref would be supplied by some reference generator called bandgap.

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