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Simulators >> Circuit Simulators >> Interpretiing data from Cadence stability analysis
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Message started by jdp on Jan 14^th, 2015, 6:47pm

Title: Interpretiing data from Cadence stability analysis
Post by jdp on Jan 14^th, 2015, 6:47pm

Hi.

For the attached inverting amplifier config using fully diff folded cascode opamp, should the loop gain found using STB analysis (CMDM = -1) equal to [ (open-loop gain of opamp) * (beta) ] ?
- or is the loop gain not so easy to be calculated here?
- because, my simulation result is not matching with such calculation!

(here, I used beta = feedback factor = 1/11, and the open loop gain was found from open loop simulation = 933, thus, loop-gain calculated=933/11=84.8, whereas STB analysis gave a gain of 70 at dc)

Any help in this regard will be very helpful. I have searched the internet but haven't found any answer matching my query :(

Title: Re: Interpretiing data from Cadence stability analysis
Post by Ken Kundert on Jan 16^th, 2015, 5:21pm

Most likely your open loop gain calculation is incorrect. Did you open the loop to measure it. If so, that is the problem. When you open the loop you change the circuit, and results are at best approximate and often quite misleading.

Also, you should be using diffstbprobe rather than cmdmprobe. cmdmprobe has accuracy issues and so is deprecated.

-Ken

Title: Re: Interpretiing data from Cadence stability analysis
Post by jdp on Jan 16^th, 2015, 7:23pm

Thanks Ken for the reply to my query :)

I indeed didn't use any feedback while simulating the open-loop gain:
just connected a sine source with ac mag=1 between + and - inputs, and measured differential o/p (also providing each input terminal with CM bias=Vdd/2).

Is there any testbench for getting open-loop response while also maintaining the feedback, for fully-diff opamps?

Title: Re: Interpretiing data from Cadence stability analysis
Post by petitidiot on Jan 18^th, 2015, 6:28pm

Dear jdp,
Have you included the loading when simulating open loop gain?

Title: Re: Interpretiing data from Cadence stability analysis
Post by jdp on Jan 18^th, 2015, 8:57pm

Thanks petitidiot for your concern :)

Yes, that's what I subsequently figured out!
On simulating the open-loop gain with a load resistance of 10 M Ohm connected at the output, I found that the open loop-gain decreased, and the [ (open-loop gain of opamp) * (beta) ] approx. matched the loop gain found using STB analysis (CMDM = -1).

BUT, correlating the Phase-margin between the two methods seems to be difficult. Like, the phase margin calculated from STB analysis (for closed loop with beta=1/11) should be better (i.e., more) than the P.M. from the open-loop gain Bode plot (as it is like the plot of A*beta with beta = 1)? - but, I am seeing the opposite!

...maybe the pole due to large 1 MOhm is affecting the P.M. when the f/b is used?...any idea on this?

Title: Re: Interpretiing data from Cadence stability analysis
Post by raja.cedt on Jan 19^th, 2015, 3:35am

you should use 11M as loading resistance rather 10M.

Title: Re: Interpretiing data from Cadence stability analysis
Post by jdp on Jan 19^th, 2015, 8:41am

Many thanks Raja for pointing that out.. :)

Title: Re: Interpretiing data from Cadence stability analysis
Post by hiSkill_11 on Sep 6^th, 2015, 11:17pm

Hi Raja,

Could you please help me understand that why loading is 11M not 10M? In my memory, considering loading effect of OTA, we just need consider about loading the OTA with 10M to caculate the OTA gain, right?

Thanks in advance.

raja.cedt wrote on Jan 19^th, 2015, 3:35am:

you should use 11M as loading resistance rather 10M.