The Designer's Guide Community Forum

The Designer's Guide Community Forum
https://designers-guide.org/forum/YaBB.pl
Design Languages >> Verilog-AMS >> Why there is no sine wave after adding a digital module?
https://designers-guide.org/forum/YaBB.pl?num=1427814612

Message started by ruwan2 on Mar 31^st, 2015, 8:10am

Title: Why there is no sine wave after adding a digital module?
Post by ruwan2 on Mar 31^st, 2015, 8:10am

Hi,

I am learning verilog-AMS. When I only use sine wave module sinVarFreq, there is a sine wave in the transient analysis. If I add a digital module, please see the full code in the following snippnet, there is no sine wave in transient window. What is missing if there are both digital and analog in a project?

Thanks,

Code:

.LIB "testbench.vams"
.lib "sine_source.vams"
.ELABORATE work.testbench
.ELABORATE work.sinVarFreq
.Trace Tran IN(M) Min=-1.0000000e+00 Max=3.0000000e+00
.Trace Tran src Min=-1.0000000e+00 Max=3.0000000e+00
xsine src src_n sinVarFreq
xtest_bench testbench

............
`timescale 100ps / 1ps
`include "disciplines.vams"

module testbench ();
electrical gnd;
ground gnd;

reg clk;
initial clk=0;
wire b;

always begin
#10
clk=1;
#10
clk=0;
#10
clk=1'bx;
#10
clk=0;
#10
clk=1'bz;
end

buffer buf0 (b, clk);
resistor #(.r(100k)) r0 (b, gnd);
endmodule

module buffer (out, in);
output out;
input in;

assign out = in;
endmodule
.............
`include "disciplines.vams"
`include "constants.vams"

module sinVarFreq(p, n);

inout p, n;
electrical p, n;

parameter real freq = 1.0e5;
parameter real coeff = 1.0e-3;
real tempr;

analog begin
V(p,n) <+ sin(`M_TWO_PI * freq * $abstime * 80e2);
end
endmodule

Title: Re: Why there is no sine wave after adding a digital module?
Post by boulate on Apr 1^st, 2015, 9:14pm

Hi,

Your verilog-a source is floating, try to replace
xsine src src_n sinVarFreq
by
xsine src 0 sinVarFreq