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https://designers-guide.org/forum/YaBB.pl Simulators >> Circuit Simulators >> Spectre: Verilog-A Sweep Problem https://designers-guide.org/forum/YaBB.pl?num=1429283376 Message started by Dshoter on Apr 17th, 2015, 8:09am |
Title: Spectre: Verilog-A Sweep Problem Post by Dshoter on Apr 17th, 2015, 8:09am Hi. I have a verilog-A block in Spectre, and I want to perform a sweep in one of the variables of the block. Let's say that the variable name is X. When I choose the sweep option inside the analyses, I select "Component Parameter", and them give the name of my parameter.. I declared X as parameter.. But I'm getting the following error: "Real Value expected for parameter 'X'". Any one knows how I can do this sweep? Thank for your time. With best regards. |
Title: Re: Spectre: Verilog-A Sweep Problem Post by Ken Kundert on Apr 17th, 2015, 11:58am You explanation is pretty short on details that we can use to help you. What parameter did you specify? What value? Was it real? Who complained, ADE or Spectre? Let's assume that it was Spectre that complained. You should post the fragment of the netlist that contains the parameter sweep. -Ken |
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