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Other CAD Tools >> Physical Verification, Extraction and Analysis >> Error while generating LEF file in Abstract in cadence
https://designers-guide.org/forum/YaBB.pl?num=1430978011

Message started by VINAY RAO on May 6^th, 2015, 10:53pm

Title: Error while generating LEF file in Abstract in cadence
Post by VINAY RAO on May 6^th, 2015, 10:53pm

I have designed a cascode LNA and used an on-chip inductor from VDD to output node "OutL". The functionality is verified through post-lyout simulation and also I could generate gds file. However, I am getting following error after running EXTRACT in abstract.

"Extraction has been aborted because a short has been detected between the nets VDD and outL.
Check the following
1)If you are performing antenna extraction, ensure that "Layer Assignment for Antenna Extraction" table
on the "Antenna" tab has been populated correctly. The geometry specification for the diffusion layer in the table should read
"diff diff and not poly".
2>Ensure that the "Layer connectivity" on the "General" tab is set up correctly for all layers, especially for polysilicon and
metal1 and diffusion and metal1, such as "(ploy metal1 contact) (diff metal1 contact)""

Though it is showing right mark in EXTRACT column, abstract run is not moving beyond 22%. I couldn't understand the error and suggestion given during EXTRACT run. There are no short exist between VDD and outL. Can any one tell me, how to rectify these errors? In abstract it has passed "pins" perfectly.

Regards,

Vinay Rao.

Title: Re: Error while generating LEF file in Abstract in cadence
Post by boe on May 7^th, 2015, 2:28am

VINAY RAO,
you might have a device between these nodes that is extracted as short (e.g. a poly resistor)...
- B O E