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Message started by newic on May 19th, 2015, 12:23am

Title: stb break loop location
Post by newic on May 19th, 2015, 12:23am

hi

for the STB analysis in the circuit below, I have defined the 3 location that we can break the loop (break1, break2 & break3). All these gave me the same gain/phase plot. However when i use AC method (non-STB), it give different results in break1 & break3. The break2 shows the same result as in the STB. The STB can break in any locations as long as the loop is break?
can someone explain why?

the ac method is the one to break the loop by big R-C or L-C.

Title: Re: stb break loop location
Post by newic on May 19th, 2015, 12:25am

picture

Title: Re: stb break loop location
Post by newic on May 19th, 2015, 12:25am

picture

Title: Re: stb break loop location
Post by newic on May 19th, 2015, 12:26am

picture

Title: Re: stb break loop location
Post by Ken Kundert on May 19th, 2015, 7:35am

The "AC method" as you call it is wrong, don't use it.

-Ken

Title: Re: stb break loop location
Post by newic on May 19th, 2015, 5:56pm

what shall i called for those using non-STB method?

one more question, according to Jacob Baker famous analog book, it uses simple RC to break the loop. Furthermore it inject ac at the non-feedback path.  The result should be similar to STB method if really big RC is used and include the loading after the breaking point right. any comment?

i think most ppl using this method due to his book since it is so famous.
any comment?

Title: Re: stb break loop location
Post by Ken Kundert on May 20th, 2015, 8:54pm

It is not accurate. Do not use it.

-Ken

Title: Re: stb break loop location
Post by ywguo on Jul 4th, 2015, 7:55pm

Hi newic,

Probably in your case the inverting input of the amplifier has minor effect on the loop gain. So gain and phase response of AC analysis is similar with that of STB analysis. However, even the inverting input amplifier may affect the bandwidth for some wide-band application. Do NOT use AC analysis instead of STB.


Yawei

Title: Re: stb break loop location
Post by newic on Jul 27th, 2015, 12:43am

how to simulate stb in hspice?

Title: Re: stb break loop location
Post by Frank Wiedmann on Jul 28th, 2015, 1:35am

Search the manual for .LSTB (Loop Stability Analysis).

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