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Simulators >> Circuit Simulators >> Open loop pole-zero analysis of Boost Converters using PSS and PAC
https://designers-guide.org/forum/YaBB.pl?num=1437565325

Message started by a_k on Jul 22nd, 2015, 4:42am

Title: Open loop pole-zero analysis of Boost Converters using PSS and PAC
Post by a_k on Jul 22nd, 2015, 4:42am

Hi ALL,

I am trying to find the open loop pole-zeros of Boost converter (which operates in Boundary condition mode [BCM]) using PSS and PAC analysis.
The Boost converter is made to work in BCM by turning the MOSFET on whenever the inductor current goes to zero and turning off the MOSFET whenever the inductor current reaches some peak current. This inductor peak current is determined by an external current source. The control circuit has been implemented using VerilogA block.
There are two transfer functions, one from input voltage(Vi) to output voltage(Vo) and another one from control input (which is the external current source[I_ext]) to output voltage, you can refer the circuit attached.

I was able to run the transient analysis and the result were satisfactory. I used the frequeny of MOSFET control signal obtained from transient analysis as the beat frequency for PSS and PAC analysis.

// VerilogA for verilog_a, Comparators1, veriloga

`include "constants.vams"
`include "disciplines.vams"

module Comparators1(vp,vn,r,s,iin,iout);

input vp,vn,iin;
output r,s,iout;

electrical vp,vn,r,s,iin,iout;
parameter real vdc = 0.995;
real vs,vr;

analog begin

@(initial_step)
begin
  V(r) <+ 1;
  V(s) <+ 0;
end;

@(cross(V(vp) - V(vn),0));
@(cross(V(vn) - vdc,0));

// set logic
if(V(vp) - V(vn) < 100n)
  vs = 5;
else      
  vs = 0;

// reset logic
if(V(vp) - V(vn) > I(iin,iout))
  vr = 5;
else      
  vr = 0;

// set and reset signals
V(r) <+ transition(vr,0,1n);
V(s) <+ transition(vs,0,1n);

end

endmodule

After running the PSS and PAC analysis, I was able to plot the magnitude and phase for Vo/Vi but not for Vo/I_ext.

1. Could anyone please tell what am I doing wrong in this analysis and why I am not getting the magnitude and phase plot for Vo/I_ext ?
2. Does PAC analysis work for veriloga block?

Please let me know if any further information is needed.

Below lines give the simulation details:

Global user options:
            reltol = 0.0001
           vabstol = 1e-06
           iabstol = 1e-12          
          homotopy = 7
             limit = delta
            scalem = 1
             scale = 1
        compatible = spice2
              gmin = 1e-12
            rforce = 1
          maxnotes = 5
          maxwarns = 5
            digits = 5
              cols = 80
            pivrel = 0.001
          sensfile = ../psf/sens.output
    checklimitdest = psf
              save = allpub
              tnom = 27
            scalem = 1
             scale = 1

Circuit inventory:
             nodes 13
           bsim3v3 8    
      Comparators1 1    
         capacitor 1    
          inductor 1    
           isource 1    
  my_working_diode 1    
             relay 1    
          resistor 3    
           vsource 2    

Notice from spectre during initial setup.
   Fast APS Enabled ( cktpreset=sampled ).

*******************************************************
Periodic Steady-State Analysis `pss': fund = 210.25 kHz
*******************************************************
   Bad pivoting is found during DC analysis. Option dc_pivot_check=yes is recommended for possible improvement of convergence.
   L0: Initial condition computed for node L0:1 is in error by 1 nA.
       Decrease `rforce' to reduce error in computed initial conditions.  However, setting rforce too small may result in convergence difficulties or in the matrix becoming singular.

DC simulation time: CPU = 2 ms, elapsed = 2.50387 ms.

=================================
`pss': time = (0 s -> 250.005 ms)
=================================

Important parameter values in tstab integration:
   start = 0 s
   outputstart = 0 s
   stop = 250.005 ms
   period = 4.75624 us
   maxperiods = 50
   step = 250.005 us
   maxstep = 190.25 ns
   ic = all
   useprevic = no
   skipdc = no
   reltol = 100e-06
   abstol(V) = 1 uV
   abstol(I) = 1 pA
   temp = 27 C
   tnom = 27 C
   tempeffects = all
   method = gear2only
   lteratio = 3.5
   relref = sigglobal
   cmin = 1 fF
   gmin = 1 pS
   rabsshort = 1 mOhm

Important parameter values in pss iteration:
   start = 2.59215 ms
   outputstart = 0 s
   stop = 2.59691 ms
   period = 4.75624 us
   maxperiods = 50
   steadyratio = 10e-03
   step = 250.005 us
   maxstep = 23.7812 ns
   ic = all
   useprevic = no
   skipdc = no
   reltol = 100e-06
   abstol(V) = 1 uV
   abstol(I) = 1 pA
   temp = 27 C
   tnom = 27 C
   tempeffects = all
   errpreset = conservative
   method = gear2only
   lteratio = 3.5
   relref = alllocal
   cmin = 1 fF
   gmin = 1 pS
   rabsshort = 1 mOhm

pss: The steady-state solution was achieved in 8 iterations.

MultiThread info: 3 new work threads created

****************************************************
Periodic AC Analysis `pac': freq = (1 mHz -> 20 MHz)
****************************************************

Warning from spectre during PAC analysis `pac'.
   WARNING (SPCRTRF-15029): The following results might not be accurate due to undersampling of the actual frequencies above 21.025 MHz:
       Upper side band of 5th harmonic for stimulus frequencies above 19.9738 MHz.
       Upper side band of 6th harmonic for stimulus frequencies above 19.7635 MHz.
       Upper side band of 7th harmonic for stimulus frequencies above 19.5533 MHz.
       
spectre completes with 0 errors, 2 warnings, and 4 notices.


Title: Re: Open loop pole-zero analysis of Boost Converters using PSS and PAC
Post by Geoffrey_Coram on Jul 22nd, 2015, 10:18am


a_k wrote on Jul 22nd, 2015, 4:42am:

Code:
@(initial_step)
begin
  V(r) <+ 1;
  V(s) <+ 0;
end;

...

Code:
// set and reset signals
V(r) <+ transition(vr,0,1n);
V(s) <+ transition(vs,0,1n);


I don't think you want to do this; generally, you don't want to put contributions inside an event.  On the initial step, you'll have
V(r) <+ 1
and
V(r) <+ transition(vr,0,1n);
active, and on the next step, the "1" will disappear abruptly.

I also don't understand why you have "1" in the initial step, but then it looks like you're using "5" for a high voltage later.

Title: Re: Open loop pole-zero analysis of Boost Converters using PSS and PAC
Post by Ken Kundert on Jul 22nd, 2015, 10:19am

First a few nits. You should place models and simulator output in a code block on the forum so the formatting is preserved. Also, there is no 'circuit attached'.

If you are trying to pass a small signal through the comparator, it will never work because the transition is abrupt and it controlled by a large signal (the small signal is no present when determining when the transition occurs). You need to use a comparator model with a gradual rather than abrupt transition.

-Ken

Title: Re: Open loop pole-zero analysis of Boost Converters using PSS and PAC
Post by a_k on Jul 22nd, 2015, 1:19pm

@Geoffrey_Coram

Thank You for your reply.

I did not think about the multiple assignment. I will remove the initial_step block and use below if-block as below. Can you please tell me if this eliminates the earlier problem?


Code:
if (analysis("ic"))
V(r) <+ 5;
else
V(r) <+ transition(vr,0,1n);


About the second comment, Yes you are right, I wanted to assign "5" to V(r). I will correct it.

Thank You.



@Ken,

Thank You for your reply.

I am new to this forum, sorry for the bad formatting and missing attachment. I have attached the circuit.

I will try to use a gradual transition function and perform simulation. I will try to get back to you with the results as soon as possible.

In my circuit, the small signal variations in the external current should manifest as frequency variations in the set and reset signals. Can you please tell me if a "laplace" filter will work in place of transition?

Thank You.

Title: Re: Open loop pole-zero analysis of Boost Converters using PSS and PAC
Post by Ken Kundert on Jul 22nd, 2015, 7:45pm

You do not really need a filter at all. What you need is a range of input voltages for which the gain from input to output is nonzero. Specifically, rather than using:

Code:
if (V(in) > 0)
   vr = 5;
else
   vr = 0;

You should have something like:

Code:
if (V(in) > delta)
 vr = 5;
else if (V(in) < -delta)
 vr = 0;
else
 vr = 2.5*(1 + V(in)/delta);
(Sorry for changing the model, but I found the idea of comparing a voltage to a current confusing).

This issue has been discussed before on this forum. You might want to look around a bit.

-Ken

Title: Re: Open loop pole-zero analysis of Boost Converters using PSS and PAC
Post by Ken Kundert on Jul 22nd, 2015, 8:41pm

Take a look at http://www.designers-guide.org/Forum/YaBB.pl?num=1189658426/4#4

Title: Re: Open loop pole-zero analysis of Boost Converters using PSS and PAC
Post by sheldon on Jul 22nd, 2015, 9:31pm

Did you try using pxf instead of PAC? It should pick up the
transfer functions from all the sources to the output.

Title: Re: Open loop pole-zero analysis of Boost Converters using PSS and PAC
Post by a_k on Jul 27th, 2015, 8:21am

I am really sorry for the late reply, I was out of town for some seminar.

@Ken,

I will try the gradual transition method that you have shown. I will get back with the results . Thanks a lot for the code and link.


@Sheldon,

I tried using pxf as well but since my VerilogA model was incorrect, I did not get desired results. I will try pxf with corrected verilogA model.
Thanks for the suggestion.


Title: Re: Open loop pole-zero analysis of Boost Converters using PSS and PAC
Post by a_k on Jul 28th, 2015, 9:03am

Hi ALL,

I tried implementing the comparator block as per Ken´s suggestion. But I think I am making some mistake again and simulation is not completing.
Below is the code for comparator:


Code:
// VerilogA for verilog_a, Comparators1, veriloga

`include "constants.vams"
`include "disciplines.vams"

module Comparators2(vp,vn,r,s,iin,iout);
input vp,vn,iin;
output r,s,iout;

electrical vp,vn,r,s,iin,iout;

branch (vp,vn) vres;

real vs,vr;

analog begin

     @(above(V(vres)-200n,0));
     @(above(V(vres)-100n,0));
     @(above(V(vres)-I(iin,iout)-100n,0));
     @(above(V(vres)-I(iin,iout)+100n,0));

     // set logic
     if(V(vres) > 200n)
           V(s) <+ 0;
     else if(V(vres) < 100n)
           V(s) <+ 5;
     else
           V(s) <+ 2.5*(1 - (V(vres)-150n)/50n);

     // reset logic
     if((V(vres)-I(iin,iout)) > 100n)
           V(r) <+ 5;
     else if((V(vres)-I(iin,iout)) < -100n)
           V(r) <+ 0;
     else
           V(r) <+ 2.5*(1+V(vres)/100n);


end

endmodule



Code:
*************************************************
Transient Analysis `tran': time = (0 s -> 150 ms)
*************************************************

Notice from spectre during IC analysis, during transient analysis `tran'.
   GminDC = 1 pS is large enough to noticeably affect the DC solution.
       dV(I33.MP1.m1:int_s) = -593.122 mV
       Use the `gmin_check' option to eliminate or expand this report.
   L0: Initial condition computed for node L0:1 is in error by 2 nA.
       Decrease `rforce' to reduce error in computed initial conditions.  However, setting rforce too small may result in convergence difficulties or in the matrix becoming singular.

DC simulation time: CPU = 2.999 ms, elapsed = 2.50697 ms.
Important parameter values:
   start = 0 s
   outputstart = 0 s
   stop = 150 ms
   step = 150 us
   maxstep = 1.5 ms
   ic = all
   useprevic = no
   skipdc = no
   reltol = 10e-06
   abstol(V) = 1 uV
   abstol(I) = 1 pA
   temp = 27 C
   tnom = 27 C
   tempeffects = all
   errpreset = conservative
   method = gear2only
   lteratio = 10
   relref = alllocal
   cmin = 1 fF
   gmin = 1 pS


Output and IC/nodeset summary:
                save   4       (current)
                save   12      (voltage)


Warning from spectre at time = 1.70218 us during transient analysis `tran'.
   WARNING (SPECTRE-16266): Error requirements were not satisfied because of convergence difficulties.
Warning from spectre at time = 257.998 us during transient analysis `tran'.
   WARNING (SPECTRE-16266): Error requirements were not satisfied because of convergence difficulties.
Warning from spectre at time = 260.058 us during transient analysis `tran'.
   WARNING (SPECTRE-16780): LTE tolerance was temporarily relaxed to step over a discontinuity in the signal: s.
   WARNING (SPECTRE-16881): Detected possible convergence difficulties which might be related to Verilog-A models. Use the command-line option '-ahdllint=warn' to check the Verilog-A modeling issues.

Error found by spectre at time = 629.057 us during transient analysis `tran'.
   ERROR (SPECTRE-16927): Transient simulation reaches maximum allowed number of convergence failures below minstep within 5% of stop time.
       Change option `max_minstep_nonconv' to adjust the allowed maximum number of convergence failures below minstep.
Last acceptable solution computed at 629.057 us.

The values for those nodes that did not converge on the last Newton iteration are given below.  The manner in which the convergence criteria were not satisfied is also given.
           Failed test: | Value | > RelTol*Ref + AbsTol

Top 10 Solution too large Convergence failure:
   I(V0:p) = 78.3997 kA, previously -74.5598 uA.
       update too large:  | 1.76542 kA | > 783.997 mA + 1 pA
   I(I38:r_flow) = -209.857 kA, previously 12.3957 nA.
       update too large:  | -4.28769 kA | > 2.09857 A + 1 pA
   V(I32.MN1.m1:int_s) = 14.8515 V, previously 17.2562 uV.
       update too large:  | 297.03 mV | > 148.531 uV + 1 uV
   V(I32.MN1.m1:int_d) = 14.8669 V, previously 14.9482 mV.
       update too large:  | 297.039 mV | > 198.754 uV + 1 uV


Can anyone please tell me why the simulation is not completing?
Is it because of discontnuity warning? But I do not see any discontinuity in the code. Please give some suggestions.

Title: Re: Open loop pole-zero analysis of Boost Converters using PSS and PAC
Post by Ken Kundert on Jul 28th, 2015, 2:04pm

I recommend using a larger value for delta. Just keep increasing it until it works in transient analysis and then see if you can live with the result. PSS is more finicky than transient, so you might have to increase it a bit more when you move to PSS.

-Ken

Title: Re: Open loop pole-zero analysis of Boost Converters using PSS and PAC
Post by a_k on Jul 29th, 2015, 10:46am

@Ken,

Thank you for your reply.

Title: Re: Open loop pole-zero analysis of Boost Converters using PSS and PAC
Post by a_k on Jul 31st, 2015, 2:46am

Hi ALL,

In my circuit that I posted earlier, I do not have a clock signal. The switch is driven by oscillations generated by the RS Flip Flop (together with the VerilogA Comparator block).

So I gave node 'q' of RS Flip Flop as the oscillator node in PSS analysis. In order to perform PAC analysis, I also gave PAC magnitude and frequency to the voltage and current sources. But I got the following error.


Code:
Error found by spectre during periodic steady state analysis `pss'.
   ERROR (CMI-2208): `I41' is a periodic input signal, which is inconsistent with autonomous circuits.

Can anyone please tell me what is the problem?

Thanks in advance.

Title: Re: Open loop pole-zero analysis of Boost Converters using PSS and PAC
Post by Ken Kundert on Jul 31st, 2015, 7:48pm

It seems like the error message is pretty clear. What is confusing you?

-Ken

Title: Re: Open loop pole-zero analysis of Boost Converters using PSS and PAC
Post by a_k on Aug 1st, 2015, 5:09am

@Ken,

Sorry for the incomplete question. My question is not about the error.

As I mentioned earlier, I do not have a clock signal in my circuit. So I considered my circuit as an autonomous circuit and gave oscillator node as the RS Flip Flop output 'q' in the PSS analysis form. Since I have to find the transfer functions, Vo/Vi and Vo/I_ext, I gave 'pacmag' and frequency to Vi and I_ext sources. But I was unable to run the simulation.

The PSS analysis runs when the Vi and I_ext sources are kept as DC sources. But When I have to run both PSS and PAC analysis, I have to make Vi and I_ext sources as AC sources and the simulation does not run.

Can you please tell me why the PSS analysis (considering my circuit as an autonomous circuit) does not run when I make the Vi and I_ext sources as AC sources?

Thank You.

Title: Re: Open loop pole-zero analysis of Boost Converters using PSS and PAC
Post by Ken Kundert on Aug 1st, 2015, 1:51pm


Quote:
Since I have to find the transfer functions, Vo/Vi and Vo/I_ext, I gave 'pacmag' and frequency to Vi and I_ext sources.


You only need pacmag. By adding the frequency, you are converting them to be large signal sources. The frequency of a small signal source is controlled by the analysis (just like with AC and noise), so you should not not specify freq on the small signal source itself.

-Ken

Title: Re: Open loop pole-zero analysis of Boost Converters using PSS and PAC
Post by a_k on Aug 6th, 2015, 9:16am

@Ken,

Thank you for your reply.

Title: Re: Open loop pole-zero analysis of Boost Converters using PSS and PAC
Post by a_k on Aug 7th, 2015, 6:41am

@Ken,

Thank you for your reply.

Title: Re: Open loop pole-zero analysis of Boost Converters using PSS and PAC
Post by a_k on Aug 18th, 2015, 11:36am

Hi Ken,

I implemented the VerilogA Comparator block discussed earlier with an opamp circuit (transistor level implementation).

The PSS analysis was performed in shooting mode with `q` [output of flip flop] as the oscillator node+. There was only one warning and is given below [2]. The PSS analysis results match well with `trans` analysis results. But the PAC analysis does not seem to work for this boost converter (operating as autonomous circuit). May be some parameter settings are wrong [1]. The voltage gain (Vo/Vi) and phase results are shown below and are incorrect.

Could you please tell me what might be the reason or any suggestion about how to run PAC analysis for this kind of circuit?

Please let me know if any further information is needed.

Thank you in advance.

[1] PSS and PAC settings:

Code:
pss  (  Vo  0  )  pss  fund=161.23k  harms=0  errpreset=moderate
+    tstab=249m  saveinit=yes  oscic=lin  method=gear2only
+    tstabmethod=gear2only  maxacfreq=200M  maxperiods=50  annotate=status
+    maxiters=50
pac  pac  start=1m  stop=200M  maxsideband=0  annotate=status


[2] Warning during PSS analysis:

Code:
Notice from spectre during IC analysis, during periodic steady state analysis `pss'.
   GminDC = 1 pS is large enough to noticeably affect the DC solution.
       dV(I33.MP1.m1:int_s) = -474.4 mV
       Use the `gmin_check' option to eliminate or expand this report.
   L0: Initial condition computed for node L0:1 is in error by 1 nA.
       Decrease `rforce' to reduce error in computed initial conditions.  However, setting rforce too small may result in convergence difficulties or in the matrix becoming singular.

DC simulation time: CPU = 300.954 ms, elapsed = 300.762 ms.

Using linear IC

Warning from spectre during periodic steady state analysis `pss'.
   WARNING: Linear IC: Fail to find out initial frequency. [ Early Reject ]


Title: Re: Open loop pole-zero analysis of Boost Converters using PSS and PAC
Post by a_k on Aug 18th, 2015, 11:38am

The Magnitude and phase plot obtained for Vo/Vi.

Title: Re: Open loop pole-zero analysis of Boost Converters using PSS and PAC
Post by Ken Kundert on Aug 18th, 2015, 3:57pm

1. If trying to compute loop gain to determine small signal stability, you should be using the stb analysis rather than pac.
2. Because you are using an autonomous PSS analysis, PAC by default, sweeps frequency starting at the fundamental frequency rather than from DC. You should change this using 'sweeptype=absolute'.
3. You should reduce the frequency range on your sweep.

-Ken

Title: Re: Open loop pole-zero analysis of Boost Converters using PSS and PAC
Post by a_k on Aug 21st, 2015, 2:39am

@Ken,

Thanks a lot. I got more or less proper magnitude and phase plots after changing the `sweeptype` to `absolute`.

But I am confused about your first point. Should I use `stb` or `pstb` analysis to find the loop gain for this kind of circuit?

Title: Re: Open loop pole-zero analysis of Boost Converters using PSS and PAC
Post by Ken Kundert on Aug 21st, 2015, 11:25pm

PSTB

Title: Re: Open loop pole-zero analysis of Boost Converters using PSS and PAC
Post by a_k on Sep 12th, 2015, 11:52am

Hi Ken,

As my circuit (attached) has a low frequency pole (about 6Hz); in the PAC form I gave a frequency sweep range as 10mHz to 1MHz. For this frequency range, in the magnitude and phase plot I saw that the curves were dipping near 10mHz. So I decided to give a frequency range of 1fHz to 1MHz in PAC form. The magnitude and phase plot for this frequency range is attached.

There seems to be a very low frequency poles and zeros in the system, which are impractical. This seems to change the magnitude and phase plot characteristics.

PSS and PAC settings:

Code:
pss  (  q  0  )  pss  fund=169.83k  harms=0  errpreset=moderate
+    tstab=300m  saveinit=yes  oscic=lin  readic="readic.ic"  cmin=10f
+    writefinal="readic.ic"  method=gear2only  tstabmethod=gear2only
+    maxacfreq=200M  maxperiods=100  annotate=status  maxiters=100
pac  pac  sweeptype=absolute  start=1f  stop=10M  maxsideband=0
+    annotate=status


Could you please tell me why the magnitude and phase plots have a strange behavior (curves were supposed to be flat) in the low frequency range (10-7 to 10-4 Hz) which cannot be related to realistic models?

Title: Re: Open loop pole-zero analysis of Boost Converters using PSS and PAC
Post by a_k on Sep 12th, 2015, 11:55am

The magnitude and phase plot for 10-15 to 106 Hz range:

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