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Design >> High-Speed I/O Design >> Linearizing a Bang-Bang (or Alexander) Phase Detector
https://designers-guide.org/forum/YaBB.pl?num=1447907038

Message started by Venky_analog on Nov 18^th, 2015, 8:23pm

Title: Linearizing a Bang-Bang (or Alexander) Phase Detector
Post by Venky_analog on Nov 18^th, 2015, 8:23pm

Hello guys,

As we all know, a bang-bang phase detector is a non-linear block and is like a comparator or 1-bit ADC. I know that we can model a bang-bang pd using sign function but it's non-linear. I want to linearize it so that I can design the CDR for the given Jitter Transfer Function, Jitter Tolerance specs on paper with some approximations. I am looking for good materials that address this issue. Your suggestions would be of great help to me.

Thanks in advance :)