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Design Languages >> Verilog-AMS >> AMS Errors in Sacle Factor (P=10e+15)
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Message started by frozenduck on Dec 17^th, 2015, 11:27pm

Title: AMS Errors in Sacle Factor (P=10e+15)
Post by frozenduck on Dec 17^th, 2015, 11:27pm

Dear all,

I am running AMS in IC615. If I simulate with Verilog blocks only, it works well.

After I include circuits including transistors, error occurs.

The errors shown in ncvlog.log are

ncvlog: *E,UXEXID (.../schematic/verilog.vams,20|58): Unexpected identifier 'P' after completed expression.
nch_ulvt_mac #(.ad(1.5E-14), .nrd(2.828877), .spmt(1.11111P), .spomb(0),

I guess it is because the tool cannot recognize the scaled notation "P" which is 10e+15.

However, this parameter is defined in PDK and I can not modify it.

Is there anyway to solve this or this is not the root cause?

Thank you very much.

Title: Re: AMS Errors in Sacle Factor (P=10e+15)
Post by Ken Kundert on Dec 18^th, 2015, 7:10pm

Only Verilog-AMS understands the SI scale factors. Make sure you have specified the -ams option to ncvlog.

If that is not the problem, perhaps your simulator does not support the very large or very small scale factors. Does it work with the more common scale factors like k, m, M, u, etc.

-Ken

Title: Re: AMS Errors in Sacle Factor (P=10e+15)
Post by Geoffrey_Coram on Jan 5^th, 2016, 6:33am

Verilog-AMS doesn't support P; as of LRM version 2.4, it only goes up to T. (I assume you meant 1e+15, not 10e+15.)

Title: Re: AMS Errors in Sacle Factor (P=10e+15)
Post by frozenduck on Jan 20^th, 2016, 2:53pm

To Ken,
Yes, I used Verilog-AMS and other SI scale factors work well.

To Geoffrey,
Yes, I meant 1e+15.

Is there any solution or suggestion?
Since the PDK is a practical one and provided from the foundry, I think everyone will have the same issue.

Thanks.