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Analog Verification >> Analog Functional Verification >> Veriloga Auto Parser not working when code saved!
https://designers-guide.org/forum/YaBB.pl?num=1452275065

Message started by gte558w on Jan 8^th, 2016, 9:44am

Title: Veriloga Auto Parser not working when code saved!
Post by gte558w on Jan 8^th, 2016, 9:44am

I am trying to generate Veriloga files in cadence first time with a new environment. I remember that when a file is changed and saved, cadence runs a veriloga /ams parser and reports errors etc. It is not in my case. I have tried gedit editor and no matter what error I intentionally add in the veriloga code, the parser is not initialized.

I am using cadence 6.1.

Thanks.