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Design Languages >> Verilog-AMS >> Error while compiling a circuit including a verilogA model
https://designers-guide.org/forum/YaBB.pl?num=1457018913

Message started by dollysi on Mar 3^rd, 2016, 7:28am

Title: Error while compiling a circuit including a verilogA model
Post by dollysi on Mar 3^rd, 2016, 7:28am

Hello everyone,
I am designing a circuit which includes latches and a verilogA model of a memristor. After compiling; following error appears in AMS Result browser:

ERROR 256: In file "./latch.cir" line 227:
+ OBJECT "YI30": The sign : is missing after keyword MODEL .

latch is the name of my schematic circuit which includes YI30 (which is my verilogA memristor model).
I am very new at this so I am having a lot of trouble compiling this.

:)

Title: Re: Error while compiling a circuit including a verilogA model
Post by Geoffrey_Coram on Mar 3^rd, 2016, 11:57am

Without seeing any of your files, we'd be guessing blindly. At least show us line 227!

Title: Re: Error while compiling a circuit including a verilogA model
Post by dollysi on Mar 3^rd, 2016, 12:03pm

The latch.cir file is automatically generated file. I think no change should be made in that, but I guess the verilogA code (which I am linking) has some problem.

http://webee.technion.ac.il/people/skva/Memristor%20Models/Verilog-A/memristor%20model.txt

This is my verilogA code.
Even if I use this model with other circuit, the same error is being displayed.

(filename.cir )

Title: Re: Error while compiling a circuit including a verilogA model
Post by Geoffrey_Coram on Mar 4^th, 2016, 7:04am

I opened the Verilog-A file and found this line:

parameter real model = 0;

It's not on line 227, and MODEL isn't a keyword in Verilog-AMS, but I wonder if the simulator you are using has a problem with it.

The netlist you sent me by PM did not include an instance of the memristor, only a voltage source. I suppose you specify a value for the parameter 'model' on the instance line.

I would suggest you rename this parameter to "model_type" and see if that solves the problem.