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Design >> Analog Design >> Current DAC for Continuous Time Delta Sigma ADC
https://designers-guide.org/forum/YaBB.pl?num=1461333335

Message started by cheap_salary on Apr 22^nd, 2016, 6:55am

Title: Current DAC for Continuous Time Delta Sigma ADC
Post by cheap_salary on Apr 22^nd, 2016, 6:55am

Attached circuit shows Feedback DAC of CT-DSM-ADC(Continuous Time Delta Sigma ADC).

What type of DAC do you think this DAC is, Current(Fig.4.5) or Resistive(Fig.4.3) ?

I think this DAC is current type same as Fig.4.5.
Here I have two questions.

What purpose do you think circuits inside red rectangular have ?

What purpose do you think resistors inside blue rectangular have ?
I think these resistors are not necessary for Current DAC.

Title: Re: Current DAC for Continuous Time Delta Sigma ADC
Post by DanielLam on Apr 24^th, 2016, 11:56pm

The resistors in the blue box might set the output common mode voltage.

Title: Re: Current DAC for Continuous Time Delta Sigma ADC
Post by cheap_salary on Apr 25^th, 2016, 3:32am

DanielLam wrote on Apr 24^th, 2016, 11:56pm:

The resistors in the blue box might set the output common mode voltage.

Thanks for responding.
However, I don't think so.
Common mode voltage is fed by former stage.
See Fig.4.5.

I think both red and blue boxes are for alleviation of glitch noise of current DAC.

Title: Re: Current DAC for Continuous Time Delta Sigma ADC
Post by DanielLam on Apr 29^th, 2016, 11:38pm

That circuit looks like the Resistive DAC 4.3. I see the cross-coupled switches, and the voltages are switched between the rails. The blue box resistors would serve as the voltage divider.

For current DACs, I would be expecting differential pairs and current sources.

Title: Re: Current DAC for Continuous Time Delta Sigma ADC
Post by cheap_salary on Apr 30^th, 2016, 3:26am

DanielLam wrote on Apr 29^th, 2016, 11:38pm:

That circuit looks like the Resistive DAC 4.3.
I see the cross-coupled switches, and the voltages are switched between the rails.

"H59" is not Gnd. And "H58" is not Vdd.

DanielLam wrote on Apr 29^th, 2016, 11:38pm:

For current DACs, I would be expecting differential pairs and current sources.

PMOS where its gate is fed by "H59" consitute source current.
NMOS where its gate is fed by "H58" consitute sink current.

Cross-coupled switches constitute differential pairs.

Basic topology is completely same as attached one, if we remove additional circuits inside red and blue boxes.

Title: Re: Current DAC for Continuous Time Delta Sigma ADC
Post by Frank_Heart on Nov 16^th, 2017, 3:05pm

Hi, CS,

Did you figure out the usage of circuits in red and blue box? I think they are for de-glitch purpose, but not sure how much better they will do. And it seems this is the DAC for very high SNR ADC, such that they have to minimize the ISL error?

Thanks
Feng