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Simulators >> AMS Simulators >> Design variables in AMS Designer
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Message started by Jelena on Oct 7^th, 2016, 6:00am

Title: Design variables in AMS Designer
Post by Jelena on Oct 7^th, 2016, 6:00am

Hi all,

I've been making verilog-ams models and simulated them using AMS Designer in Virtuoso.
So I've been making my testbenches in schematics and ran the simulations with ADE.
I've been using test generators from analogLib and whenever I had design variables I would use them in my models with out-of-module-referencing (ex. cds_globals.var ).
But lately, I need to change my testbench designs...I have to make my own voltage source module and now I need to have a way set global variables and if in a testbench I'm using more voltage sources, I need to pass them different values of the global variables...

like I saw being used in "textual top-level testbenches" as:
vsource #(.dc(1.8), .type("dc")) V1 (vdda, gnda);

I tried making my own mycds_globals.vams file but the ncvlog would report an error saying I'm duplicating/redefining worklib.cds_globals

My question is is there a way to make have global variables file using ADE with AMS Designer?
And, where exactly should I include a path to my_disciplines.vams so as to when I include them in my module I can just write `include "my_disciplines.vams" instead of `include "/full/path/to/my_dicsiplines.vams" ?

Thanks in advance

Title: Re: Design variables in AMS Designer
Post by Andrew Beckett on Dec 29^th, 2016, 10:44am

If you are using ADE, just create design variables in ADE, and the AMS netlisters will put these variables in the cds_globals module. There's no such thing as a global variable in Verilog, so this is emulated by using an out-of-module reference to the cds_globals module.

I guess I don't really understand your problem - design variables are global (or emulated as global).

Regards,

Andrew

Title: Re: Design variables in AMS Designer
Post by Jelena on Dec 30^th, 2016, 2:27am

Thank you for the reply!
It's been long since I posted this, and I figured a lot since then.

I've been dabbling with wreal modeling and during optimization I had the need to experiment with global variables and actually I needed to make wreal voltage generators like the ones from analogLib for example. So in the process I learned to use/create CDF parameters for my models' cellviews and use them in ADE, etc. ...

It was a very rushed start for me, so I was confused with everything. Using hdl.var, the GUI and other equivalents, that solved the problem of: `include "full/path/to/my_disciplines.vams" .