The Designer's Guide Community Forum

The Designer's Guide Community Forum
https://designers-guide.org/forum/YaBB.pl
Simulators >> Circuit Simulators >> How to build amp's open loop gain simulation circumstance?
https://designers-guide.org/forum/YaBB.pl?num=1475931954

Message started by bitplex on Oct 8^th, 2016, 6:05am

Title: How to build amp's open loop gain simulation circumstance?
Post by bitplex on Oct 8^th, 2016, 6:05am

Hi all.
A simple question from a freshling.
How to build an amp's open loop gain simulation circumstance?
for eg.
xi0 gnd inn inp out vdd amp
r1 inn out 1g
c1 inn gnd 1g
vinp inp 0 2.5 ac 1
It works, I don't know if there are another way to get this. Thank you.

Title: Re: How to build amp's open loop gain simulation circumstance?
Post by buddypoor on Oct 8^th, 2016, 8:09am

bitplex wrote on Oct 8^th, 2016, 6:05am:

.............
xi0 gnd inn inp out vdd amp
r1 inn out 1g
c1 inn gnd 1g
vinp inp 0 2.5 ac 1
It works, I don't know if there are another way to get this. Thank you.

Can somebody translate, please?

Title: Re: How to build amp's open loop gain simulation circumstance?
Post by Ken Kundert on Oct 9^th, 2016, 1:24pm

The approach you are taking, using a low pass filter to break the loop, is not accurate. You should use Spectre's STB analysis.

There has been plenty of discussion of loop gain analysis and stb analysis on this forum. Look around for more detail.

-Ken