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Design Languages >> Verilog-AMS >> Verilog A for IP encryption
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Message started by engrvip on Nov 19^th, 2016, 5:41pm

Title: Verilog A for IP encryption
Post by engrvip on Nov 19^th, 2016, 5:41pm

Hi

My requirement is that i want to encrypt my analog IP say opamp before sending to external customer for simulation with his system.

Can VERILOG-AMS help me in thi application. Or is their some other way to achieve this kind of functionality.

Regards
Vipul

Title: Re: Verilog A for IP encryption
Post by Geoffrey_Coram on Nov 21^st, 2016, 5:10am

Verilog-AMS does not have encryption in the standard. There was a company that allowed you to deliver compiled Verilog-A modules to customers to provide some level of IP protection; however, Tiburon was acquired by Mentor (which may be acquired by Siemens), so I don't know the status of that feature.

Title: Re: Verilog A for IP encryption
Post by Andrew Beckett on Dec 29^th, 2016, 11:19am

Various simulators (such as Cadence AMS Designer and Spectre) do support encryption (e.g. using ncprotect or spectre_encrypt - I think that's the tool name from memory; I don't have access to the software right now) - other simulators do too. However, these encryption methods will only work within the same family of simulators (so you couldn't expect Cadence encrypted data to work in Mentor or Synopsys simulators or any other way around).

Regards,

Andrew.